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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 | /* * Copyright (c) 2021 Andrés Manelli <am@toroid.io> * * SPDX-License-Identifier: Apache-2.0 */ /** @file * @brief System module to support early STM32 MCU configuration */ #include <zephyr/device.h> #include <zephyr/init.h> #include <soc.h> #include <zephyr/arch/cpu.h> #include <stm32_ll_system.h> #include <stm32_ll_bus.h> #include <stm32_ll_pwr.h> /** * @brief Perform SoC configuration at boot. * * This should be run early during the boot process but after basic hardware * initialization is done. * * @return 0 */ static int st_stm32_common_config(void) { #ifdef CONFIG_LOG_BACKEND_SWO /* Enable SWO trace asynchronous mode */ #if defined(CONFIG_SOC_SERIES_STM32H5X) || defined(CONFIG_SOC_SERIES_STM32H7RSX) || \ defined(CONFIG_SOC_SERIES_STM32L5X) || defined(CONFIG_SOC_SERIES_STM32U5X) || \ defined(CONFIG_SOC_SERIES_STM32WBX) LL_DBGMCU_EnableTraceClock(); #endif #if !defined(CONFIG_SOC_SERIES_STM32WBX) && defined(DBGMCU_CR_TRACE_IOEN) LL_DBGMCU_SetTracePinAssignment(LL_DBGMCU_TRACE_ASYNCH); #endif #endif /* CONFIG_LOG_BACKEND_SWO */ #if defined(CONFIG_USE_SEGGER_RTT) /* On some STM32 boards, for unclear reason, * RTT feature is working with realtime update only when * - one of the DMA is clocked. * See https://github.com/zephyrproject-rtos/zephyr/issues/34324 */ #if defined(__HAL_RCC_DMA1_CLK_ENABLE) __HAL_RCC_DMA1_CLK_ENABLE(); #elif defined(__HAL_RCC_GPDMA1_CLK_ENABLE) __HAL_RCC_GPDMA1_CLK_ENABLE(); #endif /* __HAL_RCC_DMA1_CLK_ENABLE */ #endif /* CONFIG_USE_SEGGER_RTT */ /* On some STM32 boards, for unclear reason, * RTT feature is working with realtime update only when * - one of the DBGMCU bit STOP/STANDBY/SLEEP is set * See https://github.com/zephyrproject-rtos/zephyr/issues/34324 */ /* Enable DBGMCU clock if it exists */ #if defined(LL_APB1_GRP1_PERIPH_DBGMCU) LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_DBGMCU); #elif defined(LL_APB1_GRP2_PERIPH_DBGMCU) LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_DBGMCU); #elif defined(LL_APB2_GRP1_PERIPH_DBGMCU) LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_DBGMCU); #endif /* LL_APB1_GRP1_PERIPH_DBGMCU */ #if defined(CONFIG_STM32_ENABLE_DEBUG_SLEEP_STOP) #if defined(CONFIG_SOC_SERIES_STM32H7X) LL_DBGMCU_EnableD1DebugInStopMode(); LL_DBGMCU_EnableD1DebugInSleepMode(); #elif defined(CONFIG_SOC_SERIES_STM32MP1X) LL_DBGMCU_EnableDebugInStopMode(); #elif defined(CONFIG_SOC_SERIES_STM32WB0X) LL_PWR_EnableDEEPSTOP2(); #else /* all other parts */ LL_DBGMCU_EnableDBGStopMode(); #endif #else /* keeping in mind that debugging draws a lot of power we explcitly disable when not needed */ #if defined(CONFIG_SOC_SERIES_STM32H7X) LL_DBGMCU_DisableD1DebugInStopMode(); LL_DBGMCU_DisableD1DebugInSleepMode(); #elif defined(CONFIG_SOC_SERIES_STM32MP1X) LL_DBGMCU_DisableDebugInStopMode(); #elif defined(CONFIG_SOC_SERIES_STM32WB0X) LL_PWR_DisableDEEPSTOP2(); #else /* all other parts */ LL_DBGMCU_DisableDBGStopMode(); #endif #endif /* CONFIG_STM32_ENABLE_DEBUG_SLEEP_STOP */ /* Disable DBGMCU clock if it exists */ #if defined(LL_APB1_GRP1_PERIPH_DBGMCU) LL_APB1_GRP1_DisableClock(LL_APB1_GRP1_PERIPH_DBGMCU); #elif defined(LL_APB1_GRP2_PERIPH_DBGMCU) LL_APB1_GRP2_DisableClock(LL_APB1_GRP2_PERIPH_DBGMCU); #elif defined(LL_APB2_GRP1_PERIPH_DBGMCU) LL_APB2_GRP1_DisableClock(LL_APB2_GRP1_PERIPH_DBGMCU); #endif /* LL_APB1_GRP1_PERIPH_DBGMCU */ return 0; } SYS_INIT(st_stm32_common_config, PRE_KERNEL_1, 1); |