# Copyright (c) 2014-2015 Wind River Systems, Inc.
# Copyright (c) 2016 Cadence Design Systems, Inc.
# Copyright (c) 2019 Intel Corp.
# SPDX-License-Identifier: Apache-2.0

DT_CHOSEN_IDLE_TIMER := zephyr,cortex-m-idle-timer

config CORTEX_M_SYSTICK
	bool "Cortex-M SYSTICK timer"
	depends on CPU_CORTEX_M_HAS_SYSTICK
	default y
	depends on DT_HAS_ARM_ARMV6M_SYSTICK_ENABLED || \
		   DT_HAS_ARM_ARMV7M_SYSTICK_ENABLED || \
		   DT_HAS_ARM_ARMV8M_SYSTICK_ENABLED || \
		   DT_HAS_ARM_ARMV8_1M_SYSTICK_ENABLED
	select TICKLESS_CAPABLE
	select SYSTEM_TIMER_HAS_DISABLE_SUPPORT
	select CORTEX_M_SYSTICK_INSTALL_ISR
	help
	  This module implements a kernel device driver for the Cortex-M processor
	  SYSTICK timer and provides the standard "system clock driver" interfaces.

config CORTEX_M_SYSTICK_INSTALL_ISR
	bool
	depends on CPU_CORTEX_M_HAS_SYSTICK
	help
	  This option should be selected by SysTick-based drivers so that the
	  sys_clock_isr() function is installed.

config CORTEX_M_SYSTICK_64BIT_CYCLE_COUNTER
	bool "Cortex-M SYSTICK timer with sys_clock_cycle_get_64() support"
	depends on CORTEX_M_SYSTICK
	default y if (SYS_CLOCK_HW_CYCLES_PER_SEC > 60000000)
	select TIMER_HAS_64BIT_CYCLE_COUNTER
	help
	  This driver, due to its limited 24-bits hardware counter, is already
	  tracking a separate cycle count in software. This option make that
	  count a 64-bits value to support sys_clock_cycle_get_64().
	  This is cheap to do as expensive math operations (i.e. divisions)
	  are performed only on counter interval values that always fit in
	  32 bits.

	  This is set to y by default when the hardware clock is fast enough
	  to wrap sys_clock_cycle_get_32() in about a minute or less.

config CORTEX_M_SYSTICK_IDLE_TIMER
	bool "Use an additional timer while entering IDLE"
	default $(dt_chosen_enabled,$(DT_CHOSEN_IDLE_TIMER))
	depends on COUNTER
	depends on TICKLESS_KERNEL
	depends on PM
	help
	  There are chips e.g. STMFX family that use SysTick as a system timer,
	  but SysTick is not clocked in low power mode. These chips usually have
	  another timer that is not stopped, but it has lower frequency e.g.
	  RTC, thus it can't be used as a main system timer.

	  Use the IDLE timer for timeout (wakeup) when the system is entering
	  IDLE state.

	  The chosen IDLE timer node has to support setting alarm from the
	  counter API.