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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 | /* * Copyright (c) 2020 Stephanos Ioannidis <root@stephanos.io> * Copyright (c) 2018 Lexmark International, Inc. * Copyright 2023 NXP * * SPDX-License-Identifier: Apache-2.0 */ #include <zephyr/kernel.h> #include <kernel_internal.h> #include <zephyr/arch/common/exc_handle.h> #include <zephyr/logging/log.h> #if defined(CONFIG_GDBSTUB) #include <zephyr/arch/arm/gdbstub.h> #include <zephyr/debug/gdbstub.h> #endif LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL); #define FAULT_DUMP_VERBOSE (CONFIG_FAULT_DUMP == 2) #if FAULT_DUMP_VERBOSE static const char *get_dbgdscr_moe_string(uint32_t moe) { switch (moe) { case DBGDSCR_MOE_HALT_REQUEST: return "Halt Request"; case DBGDSCR_MOE_BREAKPOINT: return "Breakpoint"; case DBGDSCR_MOE_ASYNC_WATCHPOINT: return "Asynchronous Watchpoint"; case DBGDSCR_MOE_BKPT_INSTRUCTION: return "BKPT Instruction"; case DBGDSCR_MOE_EXT_DEBUG_REQUEST: return "External Debug Request"; case DBGDSCR_MOE_VECTOR_CATCH: return "Vector Catch"; case DBGDSCR_MOE_OS_UNLOCK_CATCH: return "OS Unlock Catch"; case DBGDSCR_MOE_SYNC_WATCHPOINT: return "Synchronous Watchpoint"; default: return "Unknown"; } } static void dump_debug_event(void) { /* Read and parse debug mode of entry */ uint32_t dbgdscr = __get_DBGDSCR(); uint32_t moe = (dbgdscr & DBGDSCR_MOE_Msk) >> DBGDSCR_MOE_Pos; /* Print debug event information */ LOG_ERR("Debug Event (%s)", get_dbgdscr_moe_string(moe)); } static uint32_t dump_fault(uint32_t status, uint32_t addr) { uint32_t reason = K_ERR_CPU_EXCEPTION; /* * Dump fault status and, if applicable, status-specific information. * Note that the fault address is only displayed for the synchronous * faults because it is unpredictable for asynchronous faults. */ switch (status) { case FSR_FS_ALIGNMENT_FAULT: reason = K_ERR_ARM_ALIGNMENT_FAULT; LOG_ERR("Alignment Fault @ 0x%08x", addr); break; case FSR_FS_PERMISSION_FAULT: reason = K_ERR_ARM_PERMISSION_FAULT; LOG_ERR("Permission Fault @ 0x%08x", addr); break; case FSR_FS_SYNC_EXTERNAL_ABORT: reason = K_ERR_ARM_SYNC_EXTERNAL_ABORT; LOG_ERR("Synchronous External Abort @ 0x%08x", addr); break; case FSR_FS_ASYNC_EXTERNAL_ABORT: reason = K_ERR_ARM_ASYNC_EXTERNAL_ABORT; LOG_ERR("Asynchronous External Abort"); break; case FSR_FS_SYNC_PARITY_ERROR: reason = K_ERR_ARM_SYNC_PARITY_ERROR; LOG_ERR("Synchronous Parity/ECC Error @ 0x%08x", addr); break; case FSR_FS_ASYNC_PARITY_ERROR: reason = K_ERR_ARM_ASYNC_PARITY_ERROR; LOG_ERR("Asynchronous Parity/ECC Error"); break; case FSR_FS_DEBUG_EVENT: reason = K_ERR_ARM_DEBUG_EVENT; dump_debug_event(); break; #if defined(CONFIG_AARCH32_ARMV8_R) case FSR_FS_TRANSLATION_FAULT: reason = K_ERR_ARM_TRANSLATION_FAULT; LOG_ERR("Translation Fault @ 0x%08x", addr); break; case FSR_FS_UNSUPPORTED_EXCLUSIVE_ACCESS_FAULT: reason = K_ERR_ARM_UNSUPPORTED_EXCLUSIVE_ACCESS_FAULT; LOG_ERR("Unsupported Exclusive Access Fault @ 0x%08x", addr); break; #else case FSR_FS_BACKGROUND_FAULT: reason = K_ERR_ARM_BACKGROUND_FAULT; LOG_ERR("Background Fault @ 0x%08x", addr); break; #endif default: LOG_ERR("Unknown (%u)", status); } return reason; } #endif #if defined(CONFIG_FPU_SHARING) static ALWAYS_INLINE void z_arm_fpu_caller_save(struct __fpu_sf *fpu) { __asm__ volatile ( "vstmia %0, {s0-s15};\n" : : "r" (&fpu->s[0]) : "memory" ); #if CONFIG_VFP_FEATURE_REGS_S64_D32 __asm__ volatile ( "vstmia %0, {d16-d31};\n\t" : : "r" (&fpu->d[0]) : "memory" ); #endif } /** * @brief FPU undefined instruction fault handler * * @return Returns true if the FPU is already enabled * implying a true undefined instruction * Returns false if the FPU was disabled */ bool z_arm_fault_undef_instruction_fp(void) { /* * Assume this is a floating point instruction that faulted because * the FP unit was disabled. Enable the FP unit and try again. If * the FP was already enabled then this was an actual undefined * instruction. */ if (__get_FPEXC() & FPEXC_EN) return true; __set_FPEXC(FPEXC_EN); if (_current_cpu->nested > 1) { /* * If the nested count is greater than 1, the undefined * instruction exception came from an irq/svc context. (The * irq/svc handler would have the nested count at 1 and then * the undef exception would increment it to 2). */ struct __fpu_sf *spill_esf = (struct __fpu_sf *)_current_cpu->fp_ctx; if (spill_esf == NULL) return false; _current_cpu->fp_ctx = NULL; /* * If the nested count is 2 and the current thread has used the * VFP (whether or not it was actually using the VFP before the * current exception) OR if the nested count is greater than 2 * and the VFP was enabled on the irq/svc entrance for the * saved exception stack frame, then save the floating point * context because it is about to be overwritten. */ if (((_current_cpu->nested == 2) && (_current->base.user_options & K_FP_REGS)) || ((_current_cpu->nested > 2) && (spill_esf->undefined & FPEXC_EN))) { /* * Spill VFP registers to specified exception stack * frame */ spill_esf->undefined |= FPEXC_EN; spill_esf->fpscr = __get_FPSCR(); z_arm_fpu_caller_save(spill_esf); } } else { /* * If the nested count is one, a thread was the faulting * context. Just flag that this thread uses the VFP. This * means that a thread that uses the VFP does not have to, * but should, set K_FP_REGS on thread creation. */ _current->base.user_options |= K_FP_REGS; } return false; } #endif /** * @brief Undefined instruction fault handler * * @return Returns true if the fault is fatal */ bool z_arm_fault_undef_instruction(struct arch_esf *esf) { #if defined(CONFIG_FPU_SHARING) /* * This is a true undefined instruction and we will be crashing * so save away the VFP registers. */ esf->fpu.undefined = __get_FPEXC(); esf->fpu.fpscr = __get_FPSCR(); z_arm_fpu_caller_save(&esf->fpu); #endif #if defined(CONFIG_GDBSTUB) z_gdb_entry(esf, GDB_EXCEPTION_INVALID_INSTRUCTION); /* Might not be fatal if GDB stub placed it in the code. */ return false; #endif /* Print fault information */ LOG_ERR("***** UNDEFINED INSTRUCTION ABORT *****"); uint32_t reason = IS_ENABLED(CONFIG_SIMPLIFIED_EXCEPTION_CODES) ? K_ERR_CPU_EXCEPTION : K_ERR_ARM_UNDEFINED_INSTRUCTION; /* Invoke kernel fatal exception handler */ z_arm_fatal_error(reason, esf); /* All undefined instructions are treated as fatal for now */ return true; } /** * @brief Prefetch abort fault handler * * @return Returns true if the fault is fatal */ bool z_arm_fault_prefetch(struct arch_esf *esf) { uint32_t reason = K_ERR_CPU_EXCEPTION; /* Read and parse Instruction Fault Status Register (IFSR) */ uint32_t ifsr = __get_IFSR(); #if defined(CONFIG_AARCH32_ARMV8_R) uint32_t fs = ifsr & IFSR_STATUS_Msk; #else uint32_t fs = ((ifsr & IFSR_FS1_Msk) >> 6) | (ifsr & IFSR_FS0_Msk); #endif /* Read Instruction Fault Address Register (IFAR) */ uint32_t ifar = __get_IFAR(); #if defined(CONFIG_GDBSTUB) /* The BKPT instruction could have caused a software breakpoint */ if (fs == IFSR_DEBUG_EVENT) { /* Debug event, call the gdbstub handler */ z_gdb_entry(esf, GDB_EXCEPTION_BREAKPOINT); } else { /* Fatal */ z_gdb_entry(esf, GDB_EXCEPTION_MEMORY_FAULT); } return false; #endif /* Print fault information*/ LOG_ERR("***** PREFETCH ABORT *****"); if (FAULT_DUMP_VERBOSE) { reason = dump_fault(fs, ifar); } /* Simplify exception codes if requested */ if (IS_ENABLED(CONFIG_SIMPLIFIED_EXCEPTION_CODES) && (reason >= K_ERR_ARCH_START)) { reason = K_ERR_CPU_EXCEPTION; } /* Invoke kernel fatal exception handler */ z_arm_fatal_error(reason, esf); /* All prefetch aborts are treated as fatal for now */ return true; } #ifdef CONFIG_USERSPACE Z_EXC_DECLARE(z_arm_user_string_nlen); static const struct z_exc_handle exceptions[] = { Z_EXC_HANDLE(z_arm_user_string_nlen) }; /* Perform an assessment whether an MPU fault shall be * treated as recoverable. * * @return true if error is recoverable, otherwise return false. */ static bool memory_fault_recoverable(struct arch_esf *esf) { for (int i = 0; i < ARRAY_SIZE(exceptions); i++) { /* Mask out instruction mode */ uint32_t start = (uint32_t)exceptions[i].start & ~0x1U; uint32_t end = (uint32_t)exceptions[i].end & ~0x1U; if (esf->basic.pc >= start && esf->basic.pc < end) { esf->basic.pc = (uint32_t)(exceptions[i].fixup); return true; } } return false; } #endif /** * @brief Data abort fault handler * * @return Returns true if the fault is fatal */ bool z_arm_fault_data(struct arch_esf *esf) { uint32_t reason = K_ERR_CPU_EXCEPTION; /* Read and parse Data Fault Status Register (DFSR) */ uint32_t dfsr = __get_DFSR(); #if defined(CONFIG_AARCH32_ARMV8_R) uint32_t fs = dfsr & DFSR_STATUS_Msk; #else uint32_t fs = ((dfsr & DFSR_FS1_Msk) >> 6) | (dfsr & DFSR_FS0_Msk); #endif /* Read Data Fault Address Register (DFAR) */ uint32_t dfar = __get_DFAR(); #if defined(CONFIG_GDBSTUB) z_gdb_entry(esf, GDB_EXCEPTION_MEMORY_FAULT); /* return false - non-fatal error */ return false; #endif #if defined(CONFIG_USERSPACE) if ((fs == COND_CODE_1(CONFIG_AARCH32_ARMV8_R, (FSR_FS_TRANSLATION_FAULT), (FSR_FS_BACKGROUND_FAULT))) || (fs == FSR_FS_PERMISSION_FAULT)) { if (memory_fault_recoverable(esf)) { return false; } } #endif /* Print fault information*/ LOG_ERR("***** DATA ABORT *****"); if (FAULT_DUMP_VERBOSE) { reason = dump_fault(fs, dfar); } /* Simplify exception codes if requested */ if (IS_ENABLED(CONFIG_SIMPLIFIED_EXCEPTION_CODES) && (reason >= K_ERR_ARCH_START)) { reason = K_ERR_CPU_EXCEPTION; } /* Invoke kernel fatal exception handler */ z_arm_fatal_error(reason, esf); /* All data aborts are treated as fatal for now */ return true; } /** * @brief Initialisation of fault handling */ void z_arm_fault_init(void) { /* Nothing to do for now */ } |