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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 | /* * Copyright (c) 2020 Alexander Mihajlovic <a@abxy.se> * * SPDX-License-Identifier: Apache-2.0 */ #include <st/l0/stm32l0.dtsi> / { soc { compatible = "st,stm32l071", "st,stm32l0", "simple-bus"; pinctrl: pin-controller@50000000 { gpioe: gpio@50001000 { compatible = "st,stm32-gpio"; gpio-controller; #gpio-cells = <2>; reg = <0x50001000 0x400>; clocks = <&rcc STM32_CLOCK_BUS_IOP 0x00000010>; }; }; i2c2: i2c@40005800 { compatible = "st,stm32-i2c-v2"; clock-frequency = <I2C_BITRATE_STANDARD>; #address-cells = <1>; #size-cells = <0>; reg = <0x40005800 0x400>; clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00400000>; interrupts = <24 0>; interrupt-names = "combined"; status = "disabled"; }; i2c3: i2c@40007800 { compatible = "st,stm32-i2c-v2"; clock-frequency = <I2C_BITRATE_STANDARD>; #address-cells = <1>; #size-cells = <0>; reg = <0x40007800 0x400>; clocks = <&rcc STM32_CLOCK_BUS_APB1 0x40000000>; interrupts = <21 0>; interrupt-names = "combined"; status = "disabled"; }; spi2: spi@40003800 { compatible = "st,stm32-spi"; #address-cells = <1>; #size-cells = <0>; reg = <0x40003800 0x400>; clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>; interrupts = <26 3>; status = "disabled"; }; timers3: timers@40000400 { compatible = "st,stm32-timers"; reg = <0x40000400 0x400>; clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000002>; resets = <&rctl STM32_RESET(APB1, 1U)>; interrupts = <16 0>; interrupt-names = "global"; st,prescaler = <0>; status = "disabled"; pwm { compatible = "st,stm32-pwm"; status = "disabled"; #pwm-cells = <3>; }; counter { compatible = "st,stm32-counter"; status = "disabled"; }; }; timers6: timers@40001000 { compatible = "st,stm32-timers"; reg = <0x40001000 0x400>; clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000010>; resets = <&rctl STM32_RESET(APB1, 4U)>; interrupts = <17 0>; interrupt-names = "global"; st,prescaler = <0>; status = "disabled"; counter { compatible = "st,stm32-counter"; status = "disabled"; }; }; timers7: timers@40001400 { compatible = "st,stm32-timers"; reg = <0x40001400 0x400>; clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000020>; resets = <&rctl STM32_RESET(APB1, 5U)>; interrupts = <18 0>; interrupt-names = "global"; st,prescaler = <0>; status = "disabled"; counter { compatible = "st,stm32-counter"; status = "disabled"; }; }; timers22: timers@40011400 { compatible = "st,stm32-timers"; reg = <0x40011400 0x400>; clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000020>; resets = <&rctl STM32_RESET(APB2, 5U)>; interrupts = <22 0>; interrupt-names = "global"; st,prescaler = <0>; status = "disabled"; pwm { compatible = "st,stm32-pwm"; status = "disabled"; #pwm-cells = <3>; }; counter { compatible = "st,stm32-counter"; status = "disabled"; }; }; usart1: serial@40013800 { compatible = "st,stm32-usart", "st,stm32-uart"; reg = <0x40013800 0x400>; clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00004000>; resets = <&rctl STM32_RESET(APB2, 14U)>; interrupts = <27 0>; status = "disabled"; }; usart4: serial@40004c00 { compatible = "st,stm32-usart", "st,stm32-uart"; reg = <0x40004c00 0x400>; clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00080000>; resets = <&rctl STM32_RESET(APB1, 19U)>; interrupts = <14 0>; status = "disabled"; }; usart5: serial@40005000 { compatible = "st,stm32-usart", "st,stm32-uart"; reg = <0x40005000 0x400>; clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00100000>; resets = <&rctl STM32_RESET(APB1, 20U)>; interrupts = <14 0>; status = "disabled"; }; eeprom: eeprom@8080000{ reg = <0x08080000 DT_SIZE_K(6)>; }; }; smbus2: smbus2 { compatible = "st,stm32-smbus"; #address-cells = <1>; #size-cells = <0>; i2c = <&i2c2>; status = "disabled"; }; smbus3: smbus3 { compatible = "st,stm32-smbus"; #address-cells = <1>; #size-cells = <0>; i2c = <&i2c3>; status = "disabled"; }; }; |