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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 | /* * Copyright (c) 2017 Intel Corporation * * SPDX-License-Identifier: Apache-2.0 */ #define DT_DRV_COMPAT snps_designware_intc /* This implementation supports only the regular irqs * No support for priority filtering * No support for vectored interrupts * Firqs are also not supported * This implementation works only when sw_isr_table is enabled in zephyr */ #include <zephyr/device.h> #include <zephyr/irq_nextlevel.h> #include "intc_dw.h" #include <soc.h> #include <zephyr/irq.h> static ALWAYS_INLINE void dw_ictl_dispatch_child_isrs(uint32_t intr_status, uint32_t isr_base_offset) { uint32_t intr_bitpos, intr_offset; /* Dispatch lower level ISRs depending upon the bit set */ while (intr_status) { intr_bitpos = find_lsb_set(intr_status) - 1; intr_status &= ~(1 << intr_bitpos); intr_offset = isr_base_offset + intr_bitpos; _sw_isr_table[intr_offset].isr( _sw_isr_table[intr_offset].arg); } } static int dw_ictl_initialize(const struct device *dev) { const struct dw_ictl_config *config = dev->config; volatile struct dw_ictl_registers * const regs = (struct dw_ictl_registers *)config->base_addr; /* disable all interrupts */ regs->irq_inten_l = 0U; regs->irq_inten_h = 0U; return 0; } static void dw_ictl_isr(const struct device *dev) { const struct dw_ictl_config *config = dev->config; volatile struct dw_ictl_registers * const regs = (struct dw_ictl_registers *)config->base_addr; dw_ictl_dispatch_child_isrs(regs->irq_finalstatus_l, config->isr_table_offset); if (config->numirqs > 32) { dw_ictl_dispatch_child_isrs(regs->irq_finalstatus_h, config->isr_table_offset + 32); } } static inline void dw_ictl_intr_enable(const struct device *dev, unsigned int irq) { const struct dw_ictl_config *config = dev->config; volatile struct dw_ictl_registers * const regs = (struct dw_ictl_registers *)config->base_addr; if (irq < 32) { regs->irq_inten_l |= (1 << irq); } else { regs->irq_inten_h |= (1 << (irq - 32)); } } static inline void dw_ictl_intr_disable(const struct device *dev, unsigned int irq) { const struct dw_ictl_config *config = dev->config; volatile struct dw_ictl_registers * const regs = (struct dw_ictl_registers *)config->base_addr; if (irq < 32) { regs->irq_inten_l &= ~(1 << irq); } else { regs->irq_inten_h &= ~(1 << (irq - 32)); } } static inline unsigned int dw_ictl_intr_get_state(const struct device *dev) { const struct dw_ictl_config *config = dev->config; volatile struct dw_ictl_registers * const regs = (struct dw_ictl_registers *)config->base_addr; if (regs->irq_inten_l) { return 1; } if (config->numirqs > 32) { if (regs->irq_inten_h) { return 1; } } return 0; } static int dw_ictl_intr_get_line_state(const struct device *dev, unsigned int irq) { const struct dw_ictl_config *config = dev->config; volatile struct dw_ictl_registers * const regs = (struct dw_ictl_registers *)config->base_addr; if (config->numirqs > 32) { if ((regs->irq_inten_h & BIT(irq - 32)) != 0) { return 1; } } else { if ((regs->irq_inten_l & BIT(irq)) != 0) { return 1; } } return 0; } static void dw_ictl_config_irq(const struct device *dev); static const struct dw_ictl_config dw_config = { .base_addr = DT_INST_REG_ADDR(0), .numirqs = DT_INST_PROP(0, num_irqs), .isr_table_offset = CONFIG_DW_ISR_TBL_OFFSET, .config_func = dw_ictl_config_irq, }; static const struct irq_next_level_api dw_ictl_apis = { .intr_enable = dw_ictl_intr_enable, .intr_disable = dw_ictl_intr_disable, .intr_get_state = dw_ictl_intr_get_state, .intr_get_line_state = dw_ictl_intr_get_line_state, }; DEVICE_DT_INST_DEFINE(0, dw_ictl_initialize, NULL, NULL, &dw_config, PRE_KERNEL_1, CONFIG_DW_ICTL_INIT_PRIORITY, &dw_ictl_apis); static void dw_ictl_config_irq(const struct device *port) { IRQ_CONNECT(DT_INST_IRQN(0), DT_INST_IRQ(0, priority), dw_ictl_isr, DEVICE_DT_INST_GET(0), DT_INST_IRQ(0, sense)); } |