/*
 * Copyright (c) 2017 Linaro Limited
 *
 * SPDX-License-Identifier: Apache-2.0
 */

/dts-v1/;
#include <st/f4/stm32f429Xi.dtsi>
#include <st/f4/stm32f429zitx-pinctrl.dtsi>
#include <zephyr/dt-bindings/display/ili9xxx.h>

/ {
	model = "STMicroelectronics STM32F429I_DISC1 board";
	compatible = "st,stm32f4discovery";

	chosen {
		zephyr,console = &usart1;
		zephyr,shell-uart = &usart1;
		zephyr,sram = &sram0;
		zephyr,flash = &flash0;
		zephyr,ccm = &ccm0;
		zephyr,display = &ili9341;
	};

	sdram2: sdram@d0000000 {
		compatible = "zephyr,memory-region", "mmio-sram";
		device_type = "memory";
		reg = <0xd0000000 DT_SIZE_M(8)>;
		zephyr,memory-region = "SDRAM2";
	};

	leds {
		compatible = "gpio-leds";
		orange_led_3: led_3 {
			gpios = <&gpiog 13 GPIO_ACTIVE_HIGH>;
			label = "User LD3";
		};
		green_led_4: led_4 {
			gpios = <&gpiog 14 GPIO_ACTIVE_HIGH>;
			label = "User LD4";
		};
	};

	gpio_keys {
		compatible = "gpio-keys";
		user_button: button {
			label = "User";
			gpios = <&gpioa 0 GPIO_ACTIVE_LOW>;
		};
	};

	aliases {
		led0 = &green_led_4;
		sw0 = &user_button;
	};
};

&clk_lsi {
	status = "okay";
};

&clk_hse {
	clock-frequency = <DT_FREQ_M(8)>;
	status = "okay";
};

&pll {
	div-m = <8>;
	mul-n = <336>;
	div-p = <2>;
	div-q = <7>;
	clocks = <&clk_hse>;
	status = "okay";
};

&rcc {
	clocks = <&pll>;
	clock-frequency = <DT_FREQ_M(168)>;
	ahb-prescaler = <1>;
	apb1-prescaler = <4>;
	apb2-prescaler = <2>;
};

&usart1 {
	pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
	pinctrl-names = "default";
	current-speed = <115200>;
	status = "okay";
};

&rtc {
	clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
		 <&rcc STM32_SRC_LSI RTC_SEL(2)>;
	status = "okay";
};

&i2c1 {
	pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
	pinctrl-names = "default";
	status = "okay";
	clock-frequency = <I2C_BITRATE_FAST>;
};

&i2c2 {
	pinctrl-0 = <&i2c2_scl_pb10 &i2c2_sda_pb11>;
	pinctrl-names = "default";
	status = "okay";
	clock-frequency = <I2C_BITRATE_FAST>;
};

&i2c3 {
	pinctrl-0 = <&i2c3_scl_pa8 &i2c3_sda_pc9>;
	pinctrl-names = "default";
	status = "okay";
	clock-frequency = <I2C_BITRATE_FAST>;
};

&spi5 {
	pinctrl-0 = <&spi5_nss_pf6 &spi5_sck_pf7
		     &spi5_miso_pf8 &spi5_mosi_pf9>;
	pinctrl-names = "default";
	status = "okay";
	cs-gpios = <&gpioc 2 GPIO_ACTIVE_LOW>;
	ili9341: ili9341@0 {
		compatible = "ilitek,ili9341";
		spi-max-frequency = <5625000>;
		reg = <0>;
		cmd-data-gpios = <&gpiod 13 GPIO_ACTIVE_LOW>;
		width = <240>;
		height = <320>;
		rotation = <180>;
		pixel-format = <ILI9XXX_PIXEL_FORMAT_RGB565>;
		pwctrla = [39 2c 00 34 02];
		pwctrlb = [00 c1 30];
		timctrla = [85 00 78];
		timctrlb = [00 00];
		pwseqctrl = [64 03 12 81];
		pumpratioctrl = [20];
		disctrl = [08 82 27 04];
		vmctrl1 = [45 15];
		vmctrl2 = [90];
		enable3g = [00];
		ifctl = [01 00 06];
		ifmode = [c2];
		gamset = [01];
		frmctr1 = [00 1b];
		pwctrl1 = [10];
		pwctrl2 = [10];
		pgamctrl = [0F 29 24 0c 0e 09 4e 78 3c 09 13 05 17 11 00];
		ngamctrl = [00 16 1b 04 11 07 31 33 42 05 0c 0a 28 2f 0f];
	};
};

&fmc {
	status = "okay";
	pinctrl-0 = <&fmc_nbl0_pe0 &fmc_nbl1_pe1
		     &fmc_sdclk_pg8 &fmc_sdnwe_pc0 &fmc_sdcke1_pb5
		     &fmc_sdne1_pb6 &fmc_sdnras_pf11 &fmc_sdncas_pg15
		     &fmc_a0_pf0 &fmc_a1_pf1 &fmc_a2_pf2 &fmc_a3_pf3
		     &fmc_a4_pf4 &fmc_a5_pf5 &fmc_a6_pf12 &fmc_a7_pf13
		     &fmc_a8_pf14 &fmc_a9_pf15 &fmc_a10_pg0 &fmc_a11_pg1
		     &fmc_a12_pg2 &fmc_a13_pg3 &fmc_a14_pg4 &fmc_a15_pg5
		     &fmc_d0_pd14 &fmc_d1_pd15 &fmc_d2_pd0 &fmc_d3_pd1
		     &fmc_d4_pe7 &fmc_d5_pe8 &fmc_d6_pe9 &fmc_d7_pe10
		     &fmc_d8_pe11 &fmc_d9_pe12 &fmc_d10_pe13 &fmc_d11_pe14
		     &fmc_d12_pe15 &fmc_d13_pd8 &fmc_d14_pd9 &fmc_d15_pd10>;
	pinctrl-names = "default";

	sdram {
		status = "okay";

		power-up-delay = <100>;
		num-auto-refresh = <1>;
		mode-register = <0>;
		refresh-rate = <1386>;

		bank@1 {
			reg = <1>;

			st,sdram-control = <STM32_FMC_SDRAM_NC_8
					    STM32_FMC_SDRAM_NR_12
					    STM32_FMC_SDRAM_MWID_16
					    STM32_FMC_SDRAM_NB_4
					    STM32_FMC_SDRAM_CAS_2
					    STM32_FMC_SDRAM_SDCLK_PERIOD_3
					    STM32_FMC_SDRAM_RBURST_DISABLE
					    STM32_FMC_SDRAM_RPIPE_1>;
			st,sdram-timing = <2 7 4 7 2 2 2>;
		};
	};
};

&ltdc {
	pinctrl-0 = <&ltdc_r2_pc10 &ltdc_r3_pb0 &ltdc_r4_pa11 &ltdc_r5_pa12
		     &ltdc_r6_pb1 &ltdc_r7_pg6 &ltdc_g2_pa6 &ltdc_g3_pg10
		     &ltdc_g4_pb10 &ltdc_g5_pb11 &ltdc_g6_pc7 &ltdc_g7_pd3
		     &ltdc_b2_pd6 &ltdc_b3_pg11 &ltdc_b4_pg12 &ltdc_b5_pa3
		     &ltdc_b6_pb8 &ltdc_b7_pb9 &ltdc_de_pf10 &ltdc_clk_pg7
		     &ltdc_hsync_pc6 &ltdc_vsync_pa4>;
	pinctrl-names = "default";
	ext-sdram = <&sdram2>;
	status = "okay";

	width = <240>;
	height = <320>;
	pixel-format = <PANEL_PIXEL_FORMAT_RGB_565>;
	display-timings {
		compatible = "zephyr,panel-timing";
		de-active = <0>;
		pixelclk-active = <0>;
		hsync-active = <0>;
		vsync-active = <0>;
		hsync-len = <10>;
		vsync-len = <2>;
		hback-porch= <20>;
		vback-porch = <2>;
		hfront-porch = <10>;
		vfront-porch = <4>;
	};
	def-back-color-red = <0xFF>;
	def-back-color-green = <0xFF>;
	def-back-color-blue = <0xFF>;
};