Loading...
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 | # Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. # SPDX-License-Identifier: Apache-2.0 config SOC_ESP32S2 bool "ESP32S2" select XTENSA select ATOMIC_OPERATIONS_C select DYNAMIC_INTERRUPTS select CLOCK_CONTROL select PINCTRL select XIP select HAS_ESPRESSIF_HAL if SOC_ESP32S2 config IDF_TARGET_ESP32S2 bool "ESP32S2 as target board" default y config ESPTOOLPY_FLASHFREQ_80M bool default y config FLASH_SIZE int default $(dt_node_reg_size_int,/soc/flash-controller@3f402000/flash@0,0) config FLASH_BASE_ADDRESS hex default $(dt_node_reg_addr_hex,/soc/flash-controller@3f402000/flash@0) choice prompt "Instruction cache line size" default ESP32S2_INSTRUCTION_CACHE_LINE_32B config ESP32S2_INSTRUCTION_CACHE_LINE_16B bool "16 Bytes" config ESP32S2_INSTRUCTION_CACHE_LINE_32B bool "32 Bytes" endchoice choice prompt "Instruction cache size" default ESP32S2_INSTRUCTION_CACHE_8KB config ESP32S2_INSTRUCTION_CACHE_8KB bool "8KB instruction cache size" config ESP32S2_INSTRUCTION_CACHE_16KB bool "16KB instruction cache size" endchoice choice prompt "Data cache size" default ESP32S2_DATA_CACHE_0KB if !ESP_SPIRAM default ESP32S2_DATA_CACHE_8KB if ESP_SPIRAM config ESP32S2_DATA_CACHE_0KB bool "0KB data cache size" config ESP32S2_DATA_CACHE_8KB bool "8KB data cache size" config ESP32S2_DATA_CACHE_16KB bool "16KB data cache size" endchoice choice prompt "Data cache line size" default ESP32S2_DATA_CACHE_LINE_32B config ESP32S2_DATA_CACHE_LINE_16B bool "16 Bytes" config ESP32S2_DATA_CACHE_LINE_32B bool "32 Bytes" endchoice config ESP32S2_INSTRUCTION_CACHE_SIZE hex default 0x4000 if ESP32S2_INSTRUCTION_CACHE_16KB default 0x2000 config ESP32S2_DATA_CACHE_SIZE hex default 0x2000 if ESP32S2_DATA_CACHE_8KB default 0x4000 if ESP32S2_DATA_CACHE_16KB default 0x0000 config ESP_SPIRAM bool "Support for external, SPI-connected RAM" help This enables support for an external SPI RAM chip, connected in parallel with the main SPI flash chip. config ESP_HEAP_MIN_EXTRAM_THRESHOLD int "Minimum threshold for external RAM allocation" default 8192 range 1024 131072 depends on ESP_SPIRAM help Threshold to decide if memory will be allocated from DRAM or SPIRAM. If value of allocation size is less than this value, memory will be allocated from internal RAM. menu "SPI RAM config" depends on ESP_SPIRAM choice SPIRAM_TYPE prompt "Type of SPI RAM chip in use" default SPIRAM_TYPE_ESPPSRAM16 config SPIRAM_TYPE_ESPPSRAM16 bool "ESP-PSRAM16 or APS1604" config SPIRAM_TYPE_ESPPSRAM32 bool "ESP-PSRAM32 or IS25WP032" config SPIRAM_TYPE_ESPPSRAM64 bool "ESP-PSRAM64 or LY68L6400" endchoice # SPIRAM_TYPE config ESP_SPIRAM_SIZE int "Size of SPIRAM part" default 2097152 if SPIRAM_TYPE_ESPPSRAM16 default 4194304 if SPIRAM_TYPE_ESPPSRAM32 default 8388608 if SPIRAM_TYPE_ESPPSRAM64 help Specify size of SPIRAM part. NOTE: If SPIRAM size is greater than 4MB, only lower 4MB can be allocated using k_malloc(). menu "PSRAM clock and cs IO for ESP32S2" depends on ESP_SPIRAM config DEFAULT_PSRAM_CLK_IO int "PSRAM CLK IO number" range 0 33 default 30 help The PSRAM CLOCK IO can be any unused GPIO, user can config it based on hardware design. config DEFAULT_PSRAM_CS_IO int "PSRAM CS IO number" range 0 33 default 26 help The PSRAM CS IO can be any unused GPIO, user can config it based on hardware design. endmenu # PSRAM clock and cs IO for ESP32S2 choice SPIRAM_SPEED prompt "Set RAM clock speed" default SPIRAM_SPEED_40M help Select the speed for the SPI RAM chip. config SPIRAM_SPEED_80M bool "80MHz clock speed" config SPIRAM_SPEED_40M bool "40MHz clock speed" config SPIRAM_SPEED_26M bool "26MHz clock speed" config SPIRAM_SPEED_20M bool "20MHz clock speed" endchoice # SPIRAM_SPEED config SPIRAM bool default y endmenu # SPI RAM config config ESP_SYSTEM_RTC_EXT_XTAL bool config ESP_SYSTEM_RTC_EXT_OSC bool choice ESP32S2_RTC_CLK_SRC prompt "RTC clock source" default ESP32S2_RTC_CLK_SRC_INT_RC help Choose which clock is used as RTC clock source. - "Internal 90kHz oscillator" option provides lowest deep sleep current consumption, and does not require extra external components. However frequency stability with respect to temperature is poor, so time may drift in deep/light sleep modes. - "External 32kHz crystal" provides better frequency stability, at the expense of slightly higher (1uA) deep sleep current consumption. - "External 32kHz oscillator" allows using 32kHz clock generated by an external circuit. In this case, external clock signal must be connected to 32K_XN pin. Amplitude should be <1.2V in case of sine wave signal, and <1V in case of square wave signal. Common mode voltage should be 0.1 < Vcm < 0.5Vamp, where Vamp is the signal amplitude. Additionally, 1nF capacitor must be connected between 32K_XP pin and ground. 32K_XP pin can not be used as a GPIO in this case. - "Internal 8MHz oscillator divided by 256" option results in higher deep sleep current (by 5uA) but has better frequency stability than the internal 90kHz oscillator. It does not require external components. config ESP32S2_RTC_CLK_SRC_INT_RC bool "Internal 90kHz RC oscillator" config ESP32S2_RTC_CLK_SRC_EXT_CRYS bool "External 32kHz crystal" select ESP_SYSTEM_RTC_EXT_XTAL config ESP32S2_RTC_CLK_SRC_EXT_OSC bool "External 32kHz oscillator at 32K_XN pin" select ESP_SYSTEM_RTC_EXT_OSC config ESP32S2_RTC_CLK_SRC_INT_8MD256 bool "Internal 8MHz oscillator, divided by 256 (~32kHz)" endchoice config ESP32S2_RTC_CLK_CAL_CYCLES int "Number of cycles for RTC_SLOW_CLK calibration" default 3000 if ESP32S2_RTC_CLK_SRC_EXT_CRYS || ESP32S2_RTC_CLK_SRC_EXT_OSC || ESP32S2_RTC_CLK_SRC_INT_8MD256 default 576 if ESP32S2_RTC_CLK_SRC_INT_RC range 0 125000 help When the startup code initializes RTC_SLOW_CLK, it can perform calibration by comparing the RTC_SLOW_CLK frequency with main XTAL frequency. This option sets the number of RTC_SLOW_CLK cycles measured by the calibration routine. Higher numbers increase calibration precision, which may be important for applications which spend a lot of time in deep sleep. Lower numbers reduce startup time. When this option is set to 0, clock calibration will not be performed at startup, and approximate clock frequencies will be assumed: - 90000 Hz if internal RC oscillator is used as clock source. For this use value 1024. - 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more. In case more value will help improve the definition of the launch of the crystal. If the crystal could not start, it will be switched to internal RC. choice ESP32S2_UNIVERSAL_MAC_ADDRESSES bool "Number of universally administered (by IEEE) MAC address" default ESP32S2_UNIVERSAL_MAC_ADDRESSES_TWO help Configure the number of universally administered (by IEEE) MAC addresses. During initialization, MAC addresses for each network interface are generated or derived from a single base MAC address. If the number of universal MAC addresses is two, all interfaces (WiFi station, WiFi softap) receive a universally administered MAC address. They are generated sequentially by adding 0, and 1 (respectively) to the final octet of the base MAC address. If the number of universal MAC addresses is one, only WiFi station receives a universally administered MAC address. The WiFi softap receives local MAC addresses. It's derived from the universal WiFi station MAC addresses. When using the default (Espressif-assigned) base MAC address, either setting can be used. When using a custom universal MAC address range, the correct setting will depend on the allocation of MAC addresses in this range (either 1 or 2 per device). config ESP32S2_UNIVERSAL_MAC_ADDRESSES_ONE bool "Two" select ESP_MAC_ADDR_UNIVERSE_WIFI_STA config ESP32S2_UNIVERSAL_MAC_ADDRESSES_TWO bool "Two" select ESP_MAC_ADDR_UNIVERSE_WIFI_STA select ESP_MAC_ADDR_UNIVERSE_WIFI_AP endchoice # ESP32S2_UNIVERSAL_MAC_ADDRESSES config ESP_MAC_ADDR_UNIVERSE_WIFI_AP bool config ESP_MAC_ADDR_UNIVERSE_WIFI_STA bool config ESP32S2_UNIVERSAL_MAC_ADDRESSES int default 1 if ESP32S2_UNIVERSAL_MAC_ADDRESSES_ONE default 2 if ESP32S2_UNIVERSAL_MAC_ADDRESSES_TWO config ESP32_PHY_MAX_WIFI_TX_POWER int "Max WiFi TX power (dBm)" range 10 20 default 20 help Set maximum transmit power for WiFi radio. Actual transmit power for high data rates may be lower than this setting. config ESP32_PHY_MAX_TX_POWER int default ESP32_PHY_MAX_WIFI_TX_POWER endif # SOC_ESP32S2 |