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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 | /* * Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk> * * SPDX-License-Identifier: Apache-2.0 */ #include <arm/armv8-m.dtsi> #include <zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h> #include <zephyr/dt-bindings/gpio/gpio.h> #include <zephyr/dt-bindings/i2c/i2c.h> #include <mem.h> / { cpus { #address-cells = <1>; #size-cells = <0>; cpu@0 { compatible = "arm,cortex-m33f"; reg = <0>; #address-cells = <1>; #size-cells = <1>; mpu: mpu@e000ed90 { compatible = "arm,armv8m-mpu"; reg = <0xe000ed90 0x40>; arm,num-mpu-regions = <8>; }; }; }; }; &sram { #address-cells = <1>; #size-cells = <1>; sramx: memory@4000000 { compatible = "mmio-sram"; reg = <0x4000000 DT_SIZE_K(16)>; }; sram0: memory@20000000 { compatible = "mmio-sram"; reg = <0x20000000 DT_SIZE_K(32)>; }; sram1: memory@20008000 { compatible = "zephyr,memory-region", "mmio-sram"; reg = <0x20008000 DT_SIZE_K(16)>; zephyr,memory-region = "SRAM1"; }; sram2: memory@2000c000 { compatible = "zephyr,memory-region", "mmio-sram"; reg = <0x2000c000 DT_SIZE_K(16)>; zephyr,memory-region = "SRAM2"; }; sram4: memory@20010000 { /* Connected to USB bus*/ compatible = "zephyr,memory-region", "mmio-sram"; reg = <0x20010000 DT_SIZE_K(16)>; zephyr,memory-region = "SRAM4"; }; }; &peripheral { #address-cells = <1>; #size-cells = <1>; syscon: syscon@0 { compatible = "nxp,lpc-syscon"; reg = <0x0 0x4000>; #clock-cells = <1>; }; iap: flash-controller@34000 { compatible = "nxp,iap-fmc55"; reg = <0x34000 0x18>; #address-cells = <1>; #size-cells = <1>; status = "disabled"; flash0: flash@0 { compatible = "soc-nv-flash"; reg = <0x0 DT_SIZE_K(246)>; erase-block-size = <512>; write-block-size = <512>; }; flash_reserved: flash@3d800 { compatible = "soc-nv-flash"; reg = <0x0003d800 DT_SIZE_K(10)>; status = "disabled"; }; uuid: flash@9fc70 { compatible = "nxp,lpc-uid"; reg = <0x3fc70 0x10>; }; boot_rom: flash@3000000 { compatible = "soc-nv-flash"; reg = <0x3000000 DT_SIZE_K(128)>; }; }; iocon: iocon@1000 { compatible = "nxp,lpc-iocon"; reg = <0x1000 0x100>; #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x1000 0x100>; pinctrl: pinctrl { compatible = "nxp,lpc-iocon-pinctrl"; }; pio0: pio0@0 { compatible = "nxp,lpc-iocon-pio"; reg = <0x0 0x80>; }; pio1: pio0@80 { compatible = "nxp,lpc-iocon-pio"; reg = <0x80 0x80>; }; }; gpio0: gpio@0 { compatible = "nxp,lpc-gpio"; reg = <0x8c000 0x2488>; interrupts = <4 2>,<5 2>,<6 2>,<7 2>; gpio-controller; #gpio-cells = <2>; port = <0>; }; gpio1: gpio@1 { compatible = "nxp,lpc-gpio"; reg = <0x8c000 0x2488>; interrupts = <32 2>,<33 2>,<34 2>,<35 2>; gpio-controller; #gpio-cells = <2>; port = <1>; }; flexcomm0: flexcomm@86000 { compatible = "nxp,lpc-flexcomm"; reg = <0x86000 0x1000>; interrupts = <14 0>; clocks = <&syscon MCUX_FLEXCOMM0_CLK>; status = "disabled"; }; flexcomm1: flexcomm@87000 { compatible = "nxp,lpc-flexcomm"; reg = <0x87000 0x1000>; interrupts = <15 0>; clocks = <&syscon MCUX_FLEXCOMM1_CLK>; status = "disabled"; }; flexcomm2: flexcomm@88000 { compatible = "nxp,lpc-flexcomm"; reg = <0x88000 0x1000>; interrupts = <16 0>; clocks = <&syscon MCUX_FLEXCOMM2_CLK>; status = "disabled"; }; flexcomm3: flexcomm@89000 { compatible = "nxp,lpc-flexcomm"; reg = <0x89000 0x1000>; interrupts = <17 0>; clocks = <&syscon MCUX_FLEXCOMM3_CLK>; status = "disabled"; }; flexcomm4: flexcomm@8a000 { compatible = "nxp,lpc-flexcomm"; reg = <0x8a000 0x1000>; interrupts = <18 0>; clocks = <&syscon MCUX_FLEXCOMM4_CLK>; status = "disabled"; }; flexcomm5: flexcomm@96000 { compatible = "nxp,lpc-flexcomm"; reg = <0x96000 0x1000>; interrupts = <19 0>; clocks = <&syscon MCUX_FLEXCOMM5_CLK>; status = "disabled"; }; flexcomm6: flexcomm@97000 { compatible = "nxp,lpc-flexcomm"; reg = <0x97000 0x1000>; interrupts = <20 0>; clocks = <&syscon MCUX_FLEXCOMM6_CLK>; status = "disabled"; }; flexcomm7: flexcomm@98000 { compatible = "nxp,lpc-flexcomm"; reg = <0x98000 0x1000>; interrupts = <21 0>; clocks = <&syscon MCUX_FLEXCOMM7_CLK>; status = "disabled"; }; can0: can@9d000 { compatible = "nxp,lpc-mcan"; reg = <0x9d000 0x1000>; reg-names = "m_can"; interrupts = <43 0>, <44 0>; clocks = <&syscon MCUX_MCAN_CLK>; std-filter-elements = <15>; ext-filter-elements = <15>; rx-fifo0-elements = <8>; rx-fifo1-elements = <8>; rx-buffer-elements = <8>; tx-buffer-elements = <15>; sjw = <1>; sample-point = <875>; sjw-data = <1>; sample-point-data = <875>; status = "disabled"; }; hs_lspi: spi@9f000 { compatible = "nxp,lpc-spi"; reg = <0x9f000 0x1000>; interrupts = <59 0>; clocks = <&syscon MCUX_HS_SPI_CLK>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; }; rng: rng@3a000 { compatible = "nxp,lpc-rng"; reg = <0x3a000 0x1000>; status = "okay"; }; }; &nvic { arm,num-irq-priority-bits = <3>; }; |