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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 | /* * Copyright (c) 2019 Intel Corporation. * * SPDX-License-Identifier: Apache-2.0 */ /dts-v1/; #include <espressif/esp32.dtsi> #include "esp32-pinctrl.dtsi" / { model = "esp32"; compatible = "espressif,esp32"; aliases { uart-0 = &uart0; i2c-0 = &i2c0; watchdog0 = &wdt0; }; chosen { zephyr,sram = &sram0; zephyr,console = &uart0; zephyr,shell-uart = &uart0; zephyr,flash = &flash0; }; }; &cpu0 { clock-frequency = <ESP32_CLK_CPU_240M>; }; &cpu1 { clock-frequency = <ESP32_CLK_CPU_240M>; }; &uart0 { status = "okay"; current-speed = <115200>; pinctrl-0 = <&uart0_default>; pinctrl-names = "default"; }; &uart1 { current-speed = <115200>; pinctrl-0 = <&uart1_default>; pinctrl-names = "default"; }; &uart2 { current-speed = <115200>; pinctrl-0 = <&uart2_default>; pinctrl-names = "default"; }; &gpio0 { status = "okay"; }; &gpio1 { status = "okay"; }; &i2c0 { status = "okay"; clock-frequency = <I2C_BITRATE_STANDARD>; sda-gpios = <&gpio0 21 GPIO_OPEN_DRAIN>; scl-gpios = <&gpio0 22 GPIO_OPEN_DRAIN>; pinctrl-0 = <&i2c0_default>; pinctrl-names = "default"; }; &spi2 { #address-cells = <1>; #size-cells = <0>; status = "okay"; pinctrl-0 = <&spim2_default>; pinctrl-names = "default"; }; &spi3 { #address-cells = <1>; #size-cells = <0>; status = "okay"; pinctrl-0 = <&spim3_default>; pinctrl-names = "default"; }; &timer0 { status = "disabled"; }; &timer1 { status = "disabled"; }; &timer2 { status = "disabled"; }; &timer3 { status = "disabled"; }; &trng0 { status = "okay"; }; &flash0 { status = "okay"; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; /* Reserve 60kB for the bootloader */ boot_partition: partition@1000 { label = "mcuboot"; reg = <0x00001000 0x0000F000>; read-only; }; /* Reserve 1024kB for the application in slot 0 */ slot0_partition: partition@10000 { label = "image-0"; reg = <0x00010000 0x00100000>; }; /* Reserve 1024kB for the application in slot 1 */ slot1_partition: partition@110000 { label = "image-1"; reg = <0x00110000 0x00100000>; }; /* Reserve 256kB for the scratch partition */ scratch_partition: partition@210000 { label = "image-scratch"; reg = <0x00210000 0x00040000>; }; storage_partition: partition@250000 { label = "storage"; reg = <0x00250000 0x00006000>; }; }; }; |