Loading...
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 | /* * Copyright 2022, NXP * * SPDX-License-Identifier: Apache-2.0 */ /dts-v1/; #include <nxp/nxp_rt5xx.dtsi> #include <zephyr/dt-bindings/regulator/pca9420_i2c.h> #include "mimxrt595_evk_cm33-pinctrl.dtsi" / { model = "NXP MIMXRT595-EVK board"; compatible = "nxp,mimxrt595"; aliases { sw0 = &user_button_1; sw1 = &user_button_2; led0 = &green_led; led1 = &blue_led; led2 = &red_led; usart-0 = &flexcomm0; watchdog0 = &wwdt0; magn0 = &fxos8700; accel0 = &fxos8700; }; chosen { zephyr,flash-controller = &flexspi; zephyr,flash = &mx25um51345g; zephyr,code-partition = &slot0_partition; zephyr,sram = &sram0; zephyr,console = &flexcomm0; zephyr,shell-uart = &flexcomm0; }; gpio_keys { compatible = "gpio-keys"; user_button_1: button_0 { label = "User SW1"; gpios = <&gpio0 25 GPIO_ACTIVE_LOW>; }; user_button_2: button_1 { label = "User SW2"; gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; }; }; leds { compatible = "gpio-leds"; green_led: led_1 { gpios = <&gpio1 0 0>; label = "User LED_GREEN"; }; blue_led: led_2 { gpios = <&gpio3 17 0>; label = "User LED_BLUE"; }; red_led: led_3 { gpios = <&gpio0 14 0>; label = "User LED_RED"; }; }; arduino_header: arduino-connector { compatible = "arduino-header-r3"; #gpio-cells = <2>; gpio-map-mask = <0xffffffff 0xffffffc0>; gpio-map-pass-thru = <0 0x3f>; gpio-map = <0 0 &gpio0 5 0>, /* A0 */ <1 0 &gpio0 6 0>, /* A1 */ <2 0 &gpio0 19 0>, /* A2 */ <3 0 &gpio0 13 0>, /* A3 */ <4 0 &gpio4 22 0>, /* A4 */ <5 0 &gpio4 21 0>, /* A5 */ <6 0 &gpio4 31 0>, /* D0 */ <7 0 &gpio4 30 0>, /* D1 */ <8 0 &gpio4 20 0>, /* D2 */ <9 0 &gpio4 23 0>, /* D3 */ <10 0 &gpio4 24 0>, /* D4 */ <11 0 &gpio4 25 0>, /* D5 */ <12 0 &gpio4 26 0>, /* D6 */ <13 0 &gpio4 27 0>, /* D7 */ <14 0 &gpio4 28 0>, /* D8 */ <15 0 &gpio4 29 0>, /* D9 */ <16 0 &gpio5 0 0>, /* D10 */ <17 0 &gpio5 1 0>, /* D11 */ <18 0 &gpio5 2 0>, /* D12 */ <19 0 &gpio5 3 0>, /* D13 */ <20 0 &gpio4 22 0>, /* D14 */ <21 0 &gpio4 21 0>; /* D15 */ }; }; /* * RT595 EVK board uses OS timer as the kernel timer * In case we need to switch to SYSTICK timer, then * replace &os_timer with &systick */ &os_timer { status = "okay"; }; &flexcomm0 { compatible = "nxp,lpc-usart"; status = "okay"; current-speed = <115200>; pinctrl-0 = <&pinmux_flexcomm0_usart>; pinctrl-names = "default"; }; arduino_i2c: &flexcomm4 { compatible = "nxp,lpc-i2c"; status = "okay"; clock-frequency = <I2C_BITRATE_FAST>; #address-cells = <1>; #size-cells = <0>; pinctrl-0 = <&pinmux_flexcomm4_i2c>; pinctrl-names = "default"; fxos8700: fxos8700@1e { compatible = "nxp,fxos8700"; reg = <0x1e>; int1-gpios = <&gpio0 22 GPIO_ACTIVE_LOW>; reset-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; }; }; hs_spi1: &hs_lspi1 { compatible = "nxp,lpc-spi"; pinctrl-0 = <&pinmux_flexcomm16_spi>; pinctrl-names = "default"; dmas = <&dma0 28>, <&dma0 29>; dma-names = "rx", "tx"; status = "okay"; }; arduino_serial: &flexcomm12 { compatible = "nxp,lpc-usart"; status = "okay"; current-speed = <115200>; pinctrl-0 = <&pinmux_flexcomm12_usart>; pinctrl-names = "default"; }; /* PCA9420 PMIC */ &pmic_i2c { status = "okay"; clock-frequency = <I2C_BITRATE_FAST>; #address-cells = <1>; #size-cells = <0>; pinctrl-0 = <&pinmux_pmic_i2c>; pinctrl-names = "default"; pca9420: pca9420@61 { reg = <0x61>; pca9420_sw1: sw1_buck { compatible = "regulator-pmic"; voltage-range = <PCA9420_SW1_VOLTAGE_RANGE>; current-levels = <PCA9420_CURRENT_LIMIT_LEVELS>; num-voltages = <42>; ilim-reg = <PCA9420_TOP_CNTL0>; ilim-mask = <PCA9420_TOP_CNTL0_VIN_ILIM_SEL_MASK>; num-current-levels = <7>; vsel-reg = <PCA9420_MODECFG_0_0>; vsel-mask = <PCA9420_MODECFG_0_SW1_OUT_MASK>; enable-reg = <PCA9420_MODECFG_0_2>; enable-mask = <PCA9420_MODECFG_2_SW1_EN_MASK>; enable-val = <PCA9420_MODECFG_2_SW1_EN_VAL>; min-uV = <500000>; max-uV = <1800000>; }; pca9420_sw2: sw2_buck { compatible = "regulator-pmic"; voltage-range = <PCA9420_SW2_VOLTAGE_RANGE>; num-voltages = <50>; current-levels = <PCA9420_CURRENT_LIMIT_LEVELS>; ilim-reg = <PCA9420_TOP_CNTL0>; ilim-mask = <PCA9420_TOP_CNTL0_VIN_ILIM_SEL_MASK>; num-current-levels = <7>; vsel-reg = <PCA9420_MODECFG_0_1>; vsel-mask = <PCA9420_MODECFG_1_SW2_OUT_MASK>; enable-reg = <PCA9420_MODECFG_0_2>; enable-mask = <PCA9420_MODECFG_2_SW2_EN_MASK>; enable-val = <PCA9420_MODECFG_2_SW2_EN_VAL>; min-uV = <1500000>; max-uV = <3300000>; }; pca9420_ldo1: ldo1_reg { compatible = "regulator-pmic"; voltage-range = <PCA9420_LDO1_VOLTAGE_RANGE>; num-voltages = <9>; current-levels = <PCA9420_CURRENT_LIMIT_LEVELS>; ilim-reg = <PCA9420_TOP_CNTL0>; ilim-mask = <PCA9420_TOP_CNTL0_VIN_ILIM_SEL_MASK>; num-current-levels = <7>; vsel-reg = <PCA9420_MODECFG_0_2>; vsel-mask = <PCA9420_MODECFG_2_LDO1_OUT_MASK>; enable-reg = <PCA9420_MODECFG_0_2>; enable-mask = <PCA9420_MODECFG_2_LDO1_EN_MASK>; enable-val = <PCA9420_MODECFG_2_LDO1_EN_VAL>; min-uV = <1700000>; max-uV = <1900000>; }; pca9420_ldo2: ldo2_reg { compatible = "regulator-pmic"; voltage-range = <PCA9420_LDO2_VOLTAGE_RANGE>; num-voltages = <50>; current-levels = <PCA9420_CURRENT_LIMIT_LEVELS>; ilim-reg = <PCA9420_TOP_CNTL0>; ilim-mask = <PCA9420_TOP_CNTL0_VIN_ILIM_SEL_MASK>; num-current-levels = <7>; vsel-reg = <PCA9420_MODECFG_0_3>; vsel-mask = <PCA9420_MODECFG_3_LDO2_OUT_MASK>; enable-reg = <PCA9420_MODECFG_0_2>; enable-mask = <PCA9420_MODECFG_2_LDO2_EN_MASK>; enable-val = <PCA9420_MODECFG_2_LDO2_EN_VAL>; min-uV = <1500000>; max-uV = <3300000>; }; }; }; &gpio0 { status = "okay"; }; &gpio1 { status = "okay"; }; &gpio2 { status = "okay"; }; &gpio3 { status = "okay"; }; &gpio4 { status = "okay"; }; &gpio5 { status = "okay"; }; &gpio6 { status = "okay"; }; &user_button_1 { status = "okay"; }; &user_button_2 { status = "okay"; }; &green_led { status = "okay"; }; &blue_led { status = "okay"; }; &red_led { status = "okay"; }; &dma0 { /* * The total number of dma channels available is defined by * FSL_FEATURE_DMA_NUMBER_OF_CHANNELS in the SoC features file. * Since memory from the heap pool is allocated based on the number * of DMA channels, set this property to as many channels is needed * for the platform. Adjust HEAP_MEM_POOL_SIZE in case you need more * memory. */ dma-channels = <37>; status = "okay"; }; zephyr_udc0: &usbhs { status = "okay"; }; &ctimer0 { status = "okay"; }; &ctimer1 { status = "okay"; }; &ctimer2 { status = "okay"; }; &ctimer3 { status = "okay"; }; &ctimer4 { status = "okay"; }; &wwdt0 { status = "okay"; }; &flexspi { status = "okay"; mx25um51345g: mx25um51345g@0 { compatible = "nxp,imx-flexspi-mx25um51345g"; /* MX25UM51245G is 64MB, 512MBit flash part */ size = <DT_SIZE_M(64 * 8)>; reg = <0>; spi-max-frequency = <200000000>; status = "okay"; jedec-id = [c2 81 3a]; erase-block-size = <4096>; /* * Note- ECC will be disabled with a * write block size of 1 byte. To enable ECC, ensure * writes are in multiples of 16 bytes. This reduced * block size is required for MCUBoot support. */ write-block-size = <1>; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; boot_partition: partition@0 { label = "mcuboot"; reg = <0x00000000 DT_SIZE_K(64)>; }; slot0_partition: partition@10000 { label = "image-0"; reg = <0x00010000 DT_SIZE_M(24)>; }; slot1_partition: partition@1810000 { label = "image-1"; reg = <0x01810000 DT_SIZE_M(24)>; }; scratch_partition: partition@3010000 { label = "image-scratch"; reg = <0x03010000 DT_SIZE_K(8128)>; }; storage_partition: partition@3f00000 { label = "storage"; reg = <0x03f00000 DT_SIZE_M(1)>; }; }; }; }; |