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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 | /* * Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. * * SPDX-License-Identifier: Apache-2.0 */ #include <mem.h> #include <zephyr/dt-bindings/gpio/gpio.h> #include <zephyr/dt-bindings/i2c/i2c.h> #include <zephyr/dt-bindings/interrupt-controller/esp-esp32c3-intmux.h> #include <zephyr/dt-bindings/clock/esp32c3_clock.h> #include <dt-bindings/pinctrl/esp32-pinctrl.h> / { #address-cells = <1>; #size-cells = <1>; chosen { zephyr,entropy = &trng0; zephyr,flash-controller = &flash; }; cpus { #address-cells = <1>; #size-cells = <0>; cpu0: cpu@0 { device_type = "cpu"; compatible = "espressif,riscv"; reg = <0>; }; }; pinctrl: pin-controller { compatible = "espressif,esp32-pinctrl"; status = "okay"; }; soc { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; ranges; sram0: memory@3fc7c000 { compatible = "mmio-sram"; reg = <0x3fc7c000 0x50000>; }; intc: interrupt-controller@600c2000 { #interrupt-cells = <1>; compatible = "espressif,esp32-intc"; interrupt-controller; reg = <0x600c2000 0x198>; label = "INTC_0"; status = "okay"; }; systimer0: systimer@60023000 { compatible = "espressif,esp32-systimer"; reg = <0x60023000 0x80>; interrupts = <SYSTIMER_TARGET0_EDGE_INTR_SOURCE>; interrupt-parent = <&intc>; label = "SYSTIMER_0"; status = "okay"; }; rtc: rtc@60008000 { compatible = "espressif,esp32-rtc"; reg = <0x60008000 0x1000>; label = "RTC"; xtal-freq = <ESP32_CLK_XTAL_40M>; #clock-cells = <1>; status = "ok"; }; flash: flash-controller@60002000 { compatible = "espressif,esp32-flash-controller"; label = "FLASH_CTRL"; reg = <0x60002000 0x1000>; #address-cells = <1>; #size-cells = <1>; flash0: flash@0 { compatible = "soc-nv-flash"; label = "FLASH_ESP32C3"; reg = <0 0x400000>; erase-block-size = <4096>; write-block-size = <4>; }; }; gpio0: gpio@60004000 { compatible = "espressif,esp32-gpio"; gpio-controller; #gpio-cells = <2>; reg = <0x60004000 0x800>; interrupts = <GPIO_INTR_SOURCE>; interrupt-parent = <&intc>; label = "GPIO_0"; ngpios = <32>; /* 0..31 */ }; i2c0: i2c@60013000 { compatible = "espressif,esp32-i2c"; #address-cells = <1>; #size-cells = <0>; reg = <0x60013000 0x1000>; interrupts = <I2C_EXT0_INTR_SOURCE>; interrupt-parent = <&intc>; label = "I2C_0"; clocks = <&rtc ESP32_I2C0_MODULE>; status = "disabled"; }; uart0: uart@60000000 { compatible = "espressif,esp32-uart"; reg = <0x60000000 0x400>; label = "UART_0"; status = "disabled"; interrupts = <UART0_INTR_SOURCE>; interrupt-parent = <&intc>; clocks = <&rtc ESP32_UART0_MODULE>; }; uart1: uart@60010000 { compatible = "espressif,esp32-uart"; reg = <0x60010000 0x400>; label = "UART_1"; status = "disabled"; interrupts = <UART1_INTR_SOURCE>; interrupt-parent = <&intc>; clocks = <&rtc ESP32_UART1_MODULE>; current-speed = <115200>; }; timer0: counter@6001f000 { compatible = "espressif,esp32-timer"; reg = <0x6001F000 DT_SIZE_K(4)>; interrupts = <TG0_T0_LEVEL_INTR_SOURCE>; interrupt-parent = <&intc>; label = "TIMG0_T0"; status = "disabled"; }; timer1: counter@60020000 { compatible = "espressif,esp32-timer"; reg = <0x60020000 DT_SIZE_K(4)>; interrupts = <TG1_T0_LEVEL_INTR_SOURCE>; interrupt-parent = <&intc>; label = "TIMG1_T0"; status = "disabled"; }; trng0: trng@3ff700b0 { compatible = "espressif,esp32-trng"; reg = <0x3FF700B0 0x4>; label = "TRNG_0"; status = "disabled"; }; spi2: spi@60024000 { compatible = "espressif,esp32-spi"; reg = <0x60024000 DT_SIZE_K(4)>; interrupts = <SPI2_INTR_SOURCE>; interrupt-parent = <&intc>; label = "SPI_2"; clocks = <&rtc ESP32_SPI2_MODULE>; status = "disabled"; }; wdt0: watchdog@6001f048 { compatible = "espressif,esp32-watchdog"; reg = <0x6001f048 0x20>; interrupts = <TG0_WDT_LEVEL_INTR_SOURCE>; interrupt-parent = <&intc>; clocks = <&rtc ESP32_TIMG0_MODULE>; label = "WDT_0"; status = "disabled"; }; wdt1: watchdog@60020048 { compatible = "espressif,esp32-watchdog"; reg = <0x60020048 0x20>; interrupts = <TG1_WDT_LEVEL_INTR_SOURCE>; interrupt-parent = <&intc>; clocks = <&rtc ESP32_TIMG1_MODULE>; label = "WDT_1"; status = "disabled"; }; }; }; |