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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 | # i.MX RT series # Copyright (c) 2017-2021, NXP # SPDX-License-Identifier: Apache-2.0 if SOC_SERIES_IMX_RT config SOC_SERIES default "rt" config ROM_START_OFFSET default 0x400 if BOOTLOADER_MCUBOOT default 0x2000 if BOOT_FLEXSPI_NOR || BOOT_SEMC_NOR config CAN_MCUX_FLEXCAN default y if HAS_MCUX_FLEXCAN depends on CAN config CLOCK_CONTROL_MCUX_CCM default y if HAS_MCUX_CCM depends on CLOCK_CONTROL config CLOCK_CONTROL_MCUX_CCM_REV2 default y if HAS_MCUX_CCM_REV2 depends on CLOCK_CONTROL config DISPLAY_MCUX_ELCDIF default y if HAS_MCUX_ELCDIF depends on DISPLAY config GPIO_MCUX_IGPIO default y if HAS_MCUX_IGPIO depends on GPIO config PINCTRL_IMX default y if HAS_MCUX_IOMUXC depends on PINCTRL config ENTROPY_MCUX_TRNG default y if HAS_MCUX_TRNG depends on ENTROPY_GENERATOR config I2C_MCUX_LPI2C default y if HAS_MCUX_LPI2C depends on I2C config PWM_MCUX default y if HAS_MCUX_PWM depends on PWM config ADC_MCUX_12B1MSPS_SAR default y if HAS_MCUX_12B1MSPS_SAR depends on ADC config ETH_MCUX default y if HAS_MCUX_ENET depends on NET_L2_ETHERNET config UART_MCUX_LPUART default y if HAS_MCUX_LPUART depends on SERIAL config IMX_USDHC default y if (HAS_MCUX_USDHC1 || HAS_MCUX_USDHC2) depends on SDHC if FLASH_MCUX_FLEXSPI_XIP # Avoid RWW hazards by defaulting logging to disabled choice FLASH_LOG_LEVEL_CHOICE default FLASH_LOG_LEVEL_OFF endchoice choice MEMC_LOG_LEVEL_CHOICE default MEMC_LOG_LEVEL_OFF endchoice endif # set the tick per sec as a divider of the GPT clock source config SYS_CLOCK_TICKS_PER_SEC default 4096 if MCUX_GPT_TIMER config SYS_CLOCK_HW_CYCLES_PER_SEC default 32768 if MCUX_GPT_TIMER if COUNTER config COUNTER_MCUX_GPT default y if HAS_MCUX_GPT endif # COUNTER config SPI_MCUX_LPSPI default y if HAS_MCUX_LPSPI depends on SPI config ADC_MCUX_LPADC default y if HAS_MCUX_LPADC depends on ADC config WDT_MCUX_IMX_WDOG default y depends on WATCHDOG config PM_MCUX_GPC default y if HAS_MCUX_GPC depends on SOC_SERIES_IMX_RT11XX && PM # Don't allow SOC to sleep after tests complete when PM is enabled config ZTEST_NO_YIELD default y if (ZTEST && PM) if SOC_SERIES_IMX_RT10XX && PM config CODE_DATA_RELOCATION default y config PM_MCUX_GPC default y if HAS_MCUX_GPC config PM_MCUX_DCDC default y if HAS_MCUX_DCDC config PM_MCUX_PMU default y if HAS_MCUX_PMU endif # SOC_SERIES_IMX_RT10XX && PM if CODE_SEMC config FLASH_SIZE default $(dt_node_reg_size_int,/memory@80000000,0,K) config FLASH_BASE_ADDRESS default $(dt_node_reg_addr_hex,/memory@80000000) endif # CODE_SEMC if CODE_ITCM config FLASH_SIZE default $(dt_node_reg_size_int,/soc/flexram@40028000/itcm@0,0,K) if SOC_SERIES_IMX_RT11XX default $(dt_node_reg_size_int,/soc/flexram@400b0000/itcm@0,0,K) if SOC_SERIES_IMX_RT10XX config FLASH_BASE_ADDRESS default $(dt_node_reg_addr_hex,/soc/flexram@40028000/itcm@0) if SOC_SERIES_IMX_RT11XX default $(dt_node_reg_addr_hex,/soc/flexram@400b0000/itcm@0) if SOC_SERIES_IMX_RT10XX endif # CODE_ITCM if CODE_SRAM0 config FLASH_SIZE default $(dt_node_reg_size_int,/soc/memory@1ffe0000,0,K) config FLASH_BASE_ADDRESS default $(dt_node_reg_addr_hex,/soc/memory@1ffe0000) endif # CODE_SRAM0 if CODE_FLEXSPI config FLASH_SIZE default $(dt_node_reg_size_int,/soc/spi@400cc000,1,K) if SOC_SERIES_IMX_RT11XX default $(dt_node_reg_size_int,/soc/spi@402a8000,1,K) if SOC_SERIES_IMX_RT10XX config FLASH_BASE_ADDRESS default $(dt_node_reg_addr_hex,/soc/spi@400cc000,1) if SOC_SERIES_IMX_RT11XX default $(dt_node_reg_addr_hex,/soc/spi@402a8000,1) if SOC_SERIES_IMX_RT10XX endif # CODE_FLEXSPI if CODE_FLEXSPI2 config FLASH_SIZE default $(dt_node_reg_size_int,/soc/spi@4000d000,1,K) if SOC_SERIES_IMX_RT11XX default $(dt_node_reg_size_int,/soc/spi@402a4000,1,K) if SOC_SERIES_IMX_RT10XX config FLASH_BASE_ADDRESS default $(dt_node_reg_addr_hex,/soc/spi@4000d000,1) if SOC_SERIES_IMX_RT11XX default $(dt_node_reg_addr_hex,/soc/spi@402a4000,1) if SOC_SERIES_IMX_RT10XX endif # CODE_FLEXSPI2 config USB_MCUX default y depends on USB_DEVICE_DRIVER choice USB_MCUX_CONTROLLER_TYPE default USB_DC_NXP_EHCI endchoice config VIDEO_MCUX_CSI default y if HAS_MCUX_CSI depends on VIDEO config DMA_MCUX_EDMA default y if HAS_MCUX_EDMA depends on DMA DT_CHOSEN_Z_DTCM := zephyr,dtcm choice SEGGER_RTT_SECTION default SEGGER_RTT_SECTION_DTCM if $(dt_chosen_enabled,$(DT_CHOSEN_Z_DTCM)) depends on USE_SEGGER_RTT endchoice choice SEGGER_SYSVIEW_SECTION default SEGGER_SYSVIEW_SECTION_DTCM if $(dt_chosen_enabled,$(DT_CHOSEN_Z_DTCM)) depends on SEGGER_SYSTEMVIEW endchoice # # MBEDTLS is larger but much faster than TinyCrypt so choose wisely # config MBEDTLS #config TINYCRYPT default y if CSPRING_ENABLED depends on ENTROPY_GENERATOR if MBEDTLS # # MBEDTLS CTR_DRBG code path needs extra stack space for initialization than # what the ztest_thread_stack defaults to. # config TEST_EXTRA_STACK_SIZE int default 1024 endif # MBEDTLS source "soc/arm/nxp_imx/rt/Kconfig.defconfig.mimxrt*" endif # SOC_SERIES_IMX_RT |