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* Copyright (c) 2018 Pushpal Sidhu
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <mem.h>
#include <st/l4/stm32l4.dtsi>
/ {
sram0: memory@20000000 {
reg = <0x20000000 DT_SIZE_K(640)>;
};
soc {
flash-controller@40022000 {
flash0: flash@8000000 {
erase-block-size = <4096>;
};
};
rcc: rcc@40021000 {
undershoot-prevention;
};
pinctrl: pin-controller@48000000 {
gpiod: gpio@48000c00 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x48000c00 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000008>;
label = "GPIOD";
};
gpioe: gpio@48001000 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x48001000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000010>;
label = "GPIOE";
};
gpiof: gpio@48001400 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x48001400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000020>;
label = "GPIOF";
};
gpiog: gpio@48001800 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x48001800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000040>;
label = "GPIOG";
};
};
usart3: serial@40004800 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40004800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00040000>;
interrupts = <39 0>;
status = "disabled";
label = "UART_3";
};
uart4: serial@40004c00 {
compatible = "st,stm32-uart";
reg = <0x40004c00 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00080000>;
interrupts = <52 0>;
status = "disabled";
label = "UART_4";
};
uart5: serial@40005000 {
compatible = "st,stm32-uart";
reg = <0x40005000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00100000>;
interrupts = <53 0>;
status = "disabled";
label = "UART_5";
};
i2c2: i2c@40005800 {
compatible = "st,stm32-i2c-v2";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40005800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00400000>;
interrupts = <33 0>, <34 0>;
interrupt-names = "event", "error";
status = "disabled";
label= "I2C_2";
};
i2c4: i2c@40008400 {
compatible = "st,stm32-i2c-v2";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40008400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00000002>;
interrupts = <83 0>, <84 0>;
interrupt-names = "event", "error";
status = "disabled";
label= "I2C_4";
};
spi2: spi@40003800 {
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
interrupts = <36 5>;
status = "disabled";
label = "SPI_2";
};
spi3: spi@40003c00 {
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003c00 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00008000>;
interrupts = <51 5>;
status = "disabled";
label = "SPI_3";
};
timers3: timers@40000400 {
compatible = "st,stm32-timers";
reg = <0x40000400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000002>;
interrupts = <29 0>;
interrupt-names = "global";
st,prescaler = <0>;
status = "disabled";
label = "TIMERS_3";
pwm {
compatible = "st,stm32-pwm";
status = "disabled";
label = "PWM_3";
#pwm-cells = <3>;
};
};
timers4: timers@40000800 {
compatible = "st,stm32-timers";
reg = <0x40000800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000004>;
interrupts = <30 0>;
interrupt-names = "global";
st,prescaler = <0>;
status = "disabled";
label = "TIMERS_4";
pwm {
compatible = "st,stm32-pwm";
status = "disabled";
label = "PWM_4";
#pwm-cells = <3>;
};
};
timers5: timers@40000c00 {
compatible = "st,stm32-timers";
reg = <0x40000c00 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000008>;
interrupts = <50 0>;
interrupt-names = "global";
st,prescaler = <0>;
status = "disabled";
label = "TIMERS_5";
pwm {
compatible = "st,stm32-pwm";
status = "disabled";
label = "PWM_5";
#pwm-cells = <3>;
};
};
timers7: timers@40001400 {
compatible = "st,stm32-timers";
reg = <0x40001400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000020>;
interrupts = <55 0>;
interrupt-names = "global";
st,prescaler = <0>;
status = "disabled";
label = "TIMERS_7";
pwm {
compatible = "st,stm32-pwm";
status = "disabled";
label = "PWM_7";
#pwm-cells = <3>;
};
};
timers8: timers@40013400 {
compatible = "st,stm32-timers";
reg = <0x40013400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00002000>;
interrupts = <43 0>, <44 0>, <45 0>, <46 0>;
interrupt-names = "brk", "up", "trgcom", "cc";
st,prescaler = <0>;
status = "disabled";
label = "TIMERS_8";
pwm {
compatible = "st,stm32-pwm";
status = "disabled";
label = "PWM_8";
#pwm-cells = <3>;
};
};
timers17: timers@40014800 {
compatible = "st,stm32-timers";
reg = <0x40014800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00040000>;
interrupts = <26 0>;
interrupt-names = "global";
st,prescaler = <0>;
status = "disabled";
label = "TIMERS_17";
pwm {
compatible = "st,stm32-pwm";
status = "disabled";
label = "PWM_17";
#pwm-cells = <3>;
};
};
can1: can@40006400 {
compatible = "st,stm32-can";
reg = <0x40006400 0x400>;
interrupts = <19 0>, <20 0>, <21 0>, <22 0>;
interrupt-names = "TX", "RX0", "RX1", "SCE";
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x02000000>; //RCC_APB1ENR1_CAN1EN
status = "disabled";
label = "CAN_1";
sjw = <1>;
sample-point = <875>;
};
usbotg_fs: otgfs@50000000 {
compatible = "st,stm32-otgfs";
reg = <0x50000000 0x40000>;
interrupts = <67 0>;
interrupt-names = "otgfs";
num-bidir-endpoints = <6>;
ram-size = <1280>;
maximum-speed = "full-speed";
clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00001000>;
phys = <&otgfs_phy>;
status = "disabled";
label= "OTGFS";
};
dma1: dma@40020000 {
dma-offset = <0>;
};
dma2: dma@40020400 {
dma-offset = <7>;
};
dmamux1: dmamux@40020800 {
compatible = "st,stm32-dmamux";
#dma-cells = <3>;
reg = <0x40020800 0x400>;
interrupts = <94 0>;
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x4>;
dma-channels = <14>;
dma-generators = <4>;
dma-requests= <89>;
status = "disabled";
label = "DMAMUX_1";
};
sdmmc1: sdmmc@50062400 {
compatible = "st,stm32-sdmmc";
reg = <0x50062400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x400000>;
interrupts = <49 0>;
status = "disabled";
label = "SDMMC_1";
};
dac1: dac@40007400 {
compatible = "st,stm32-dac";
reg = <0x40007400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x20000000>;
status = "disabled";
label = "DAC_1";
#io-channel-cells = <1>;
};
adc1: adc@50040000 {
has-temp-channel;
has-vref-channel;
};
};
otgfs_phy: otgfs_phy {
compatible = "usb-nop-xceiv";
#phy-cells = <0>;
label = "OTGFS_PHY";
};
};
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