Defined in 1 files as a config:

• arch/Kconfig, line 191 (as a config)

Referenced in 24 files:

• arch/arm/core/aarch32/prep_c.c, line 72
• arch/x86/Kconfig, line 371
• arch/x86/core/x86_mmu.c, line 1315
• boards/arc/iotdk/arc_mpu_regions.c, line 25
• include/zephyr/sys/mem_manage.h
  • line 70
  • line 143
  • line 144
  • line 160
  • line 161
• kernel/Kconfig.vm, line 57
• kernel/include/mmu.h
  • line 28
  • line 44
• lib/libc/newlib/libc-hooks.c, line 97
• samples/arch/mpu/mpu_test/src/main.c
  • line 21
  • line 23
• soc/arm/common/cortex_m/arm_mpu_regions.c
  • line 25
  • line 27
• soc/arm/nuvoton_npcx/common/power.c, line 68
• soc/arm/nuvoton_npcx/npcx7/mpu_regions.c, line 19
• soc/arm/nxp_imx/rt/mpu_regions.c
  • line 20
  • line 26
• soc/arm/nxp_kinetis/k6x/nxp_mpu_regions.c
  • line 33
  • line 37
  • line 48
  • line 49
• soc/arm/nxp_kinetis/k8x/nxp_mpu_regions.c
  • line 30
  • line 34
  • line 46
  • line 47
• soc/arm/nxp_kinetis/ke1xf/nxp_mpu_regions.c
  • line 30
  • line 34
  • line 46
  • line 47
• soc/arm/st_stm32/stm32h7/mpu_regions.c, line 13
• soc/riscv/openisa_rv32m1/soc.h, line 109
• soc/riscv/riscv-ite/it8xxx2/soc.h, line 14
• soc/riscv/riscv-privilege/andes_v5/ae350/soc.h, line 21
• soc/riscv/riscv-privilege/miv/soc.h, line 57
• soc/riscv/riscv-privilege/mpfs/soc.h, line 20
• soc/riscv/riscv-privilege/sifive-freedom/soc.h, line 72
• soc/x86/ia32/Kconfig.soc, line 9