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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 | /* * Copyright (c) 2018, Intel Corporation * * SPDX-License-Identifier: Apache-2.0 */ /dts-v1/; #include <microchip/mec1501hsz.dtsi> / { model = "Microchip MEC15XXEVB_ASSY6853 evaluation board"; compatible = "microchip,mec15xxevb_assy6853", "microchip,mec1501hsz"; chosen { zephyr,sram = &sram0; zephyr,console = &uart2; zephyr,flash = &flash0; }; aliases { led0 = &led2; led1 = &led3; led2 = &led4; pwm-0 = &pwm0; peci-0 = &peci0; i2c0 = &i2c_smb_0; i2c1 = &i2c_smb_1; i2c7 = &i2c_smb_2; kscan0 = &kscan0; }; leds { compatible = "gpio-leds"; led2: led_0 { /* GPIO156/LED0 on schematic, * LED2 on silkscreen. */ gpios = <&gpio_140_176 14 GPIO_ACTIVE_LOW>; label = "LED 2"; }; led3: led_1 { /* GPIO157/LED1 on schematic, * LED3 on silkscreen. */ gpios = <&gpio_140_176 15 GPIO_ACTIVE_LOW>; label = "LED 3"; }; led4: led_2 { /* GPIO153/LED2 on schematic, * LED4 on silkscreen. */ gpios = <&gpio_140_176 11 GPIO_ACTIVE_LOW>; label = "LED 4"; }; }; power-states { idle: idle { compatible = "zephyr,power-state"; power-state-name = "suspend-to-idle"; min-residency-us = <1000000>; }; suspend_to_ram: suspend_to_ram { compatible = "zephyr,power-state"; power-state-name = "suspend-to-ram"; min-residency-us = <2000000>; }; }; }; &cpu0 { cpu-power-states = <&idle &suspend_to_ram>; }; &uart2 { status = "okay"; current-speed = <115200>; }; &adc0 { status = "okay"; }; &i2c_smb_0 { status = "okay"; label = "I2C0"; port_sel = <0>; pca9555@26 { compatible = "nxp,pca95xx"; label = "GPIO_P0"; /* Depends on JP53 for device address. * Pin 1-2 = A0, pin 3-4 = A1, pin 5-6 = A2. * Address is: 0100<A2><A1><A0>b. * * Default has pin 1-2 on JP53 connected, * resulting in device address 0x26. */ reg = <0x26>; gpio-controller; #gpio-cells = <2>; }; }; &i2c_smb_1 { status = "okay"; label = "I2C1"; port_sel = <1>; }; &i2c_smb_2 { status = "okay"; label = "I2C7"; port_sel = <7>; }; &espi0 { status = "okay"; io_girq = <19>; vw_girqs = <24 25>; pc_girq = <15>; }; &timer5 { status = "okay"; }; &ps2_0 { status = "okay"; }; &ps2_1 { status = "okay"; }; &pwm0 { status = "okay"; }; &kscan0 { status = "okay"; }; &peci0 { status = "okay"; }; &spi0 { status = "okay"; port_sel = <0>; chip_select = <0>; lines = <1>; }; &tach0 { status = "okay"; }; |