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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 | # STM32 MCU clock control driver config # Copyright (c) 2017 Linaro # Copyright (c) 2017 RnDity Sp. z o.o. # SPDX-License-Identifier: Apache-2.0 menuconfig CLOCK_CONTROL_STM32_CUBE bool "STM32 Reset & Clock Control" depends on SOC_FAMILY_STM32 select USE_STM32_LL_UTILS select USE_STM32_LL_RCC if SOC_SERIES_STM32MP1X help Enable driver for Reset & Clock Control subsystem found in STM32 family of MCUs if CLOCK_CONTROL_STM32_CUBE config CLOCK_CONTROL_STM32_DEVICE_INIT_PRIORITY int "Clock Control Device Priority" default 1 help This option controls the priority of clock control device initialization. Higher priority ensures that the device is initialized earlier in the startup cycle. If unsure, leave at default value 1 DT_STM32_HSE_CLOCK := $(dt_nodelabel_path,clk_hse) DT_STM32_HSE_CLOCK_FREQ := $(dt_node_int_prop_int,$(DT_STM32_HSE_CLOCK),clock-frequency) config CLOCK_STM32_HSE_CLOCK int "HSE clock value" default "$(DT_STM32_HSE_CLOCK_FREQ)" if "$(dt_nodelabel_enabled,clk_hse)" default 8000000 help Value of external high-speed clock (HSE). This symbol could be optionally configured using device tree by setting "clock-frequency" value of clk_hse node. For instance: &clk_hse{ status = "okay"; clock-frequency = <DT_FREQ_M(25)>; }; Note: Device tree configuration is overridden when current symbol is set: CONFIG_CLOCK_STM32_HSE_CLOCK=32000000 config CLOCK_CONTROL_STM32_HAS_DTS bool default y if "$(dt_node_has_prop,rcc,clocks)" || "$(dt_node_has_prop,rcc,d1cpre)" help This symbol is added to prevent default use of CLOCK_CONTROL_STM32_* symbols when board make use of device tree to configure clocks. if !CLOCK_CONTROL_STM32_HAS_DTS && !SOC_SERIES_STM32MP1X choice CLOCK_STM32_SYSCLK_SRC prompt "STM32 System Clock Source" config CLOCK_STM32_SYSCLK_SRC_HSE bool "HSE" help Use HSE as source of SYSCLK config CLOCK_STM32_SYSCLK_SRC_HSI bool "HSI" help Use HSI as source of SYSCLK config CLOCK_STM32_SYSCLK_SRC_MSI bool "MSI" depends on SOC_SERIES_STM32L0X || SOC_SERIES_STM32L4X || SOC_SERIES_STM32L5X || SOC_SERIES_STM32WBX || SOC_SERIES_STM32WLX help Use MSI as source of SYSCLK config CLOCK_STM32_SYSCLK_SRC_PLL bool "PLL" help Use PLL as source of SYSCLK config CLOCK_STM32_SYSCLK_SRC_CSI bool "CSI" depends on SOC_SERIES_STM32H7X help Use CSI as source of SYSCLK endchoice #CLOCK_STM32_SYSCLK_SRC config CLOCK_STM32_HSE_BYPASS bool "HSE bypass" depends on CLOCK_STM32_SYSCLK_SRC_HSE || CLOCK_STM32_PLL_SRC_HSE help Enable this option to bypass external high-speed clock (HSE). config CLOCK_STM32_MSI_RANGE int "MSI frequency range" depends on CLOCK_STM32_SYSCLK_SRC_MSI || CLOCK_STM32_PLL_SRC_MSI default 8 help Frequency range of MSI when MSI range is provided in RCC_CR register Range 0: 100kHz Range 1: 200kHz Range 2 around 400 kHz Range 3 around 800 kHz Range 4: 1 MHz Range 5: 2 MHz Range 6: 4 MHz (reset value) Range 7: 8 MHz Range 8: 16 MHz Range 9: 24 MHz Range 10: 32 MHz Range 11: 48 MHz choice prompt "STM32 PLL Clock Source" default CLOCK_STM32_PLL_SRC_HSI depends on CLOCK_STM32_SYSCLK_SRC_PLL config CLOCK_STM32_PLL_SRC_MSI bool "MSI" depends on SOC_SERIES_STM32L0X || SOC_SERIES_STM32L4X || SOC_SERIES_STM32L5X || SOC_SERIES_STM32WBX || SOC_SERIES_STM32WLX help Use MSI as source of PLL config CLOCK_STM32_PLL_SRC_HSI bool "HSI" help Use HSI as source of PLL config CLOCK_STM32_PLL_SRC_HSE bool "HSE" help Use HSE as source of PLL config CLOCK_STM32_PLL_SRC_PLL2 bool "PLL2" depends on SOC_STM32F10X_CONNECTIVITY_LINE_DEVICE help Use PLL2 as source of main PLL. This is equivalent of defining PLL2 as source PREDIV1SCR. If not selected, default source is HSE. config CLOCK_STM32_PLL_SRC_CSI bool "CSI" depends on SOC_SERIES_STM32H7X help Use CSI 4MHz as source of the main PLL. endchoice # Source series specific files for PLL settings source "drivers/clock_control/Kconfig.stm32f0_f3" source "drivers/clock_control/Kconfig.stm32f1" source "drivers/clock_control/Kconfig.stm32f2_f4_f7" source "drivers/clock_control/Kconfig.stm32h7" source "drivers/clock_control/Kconfig.stm32l0_l1" source "drivers/clock_control/Kconfig.stm32l4_l5_wb_wl" source "drivers/clock_control/Kconfig.stm32g0" source "drivers/clock_control/Kconfig.stm32g4" # Bus clocks configuration options if !SOC_SERIES_STM32H7X config CLOCK_STM32_AHB_PRESCALER int "AHB prescaler" default 1 range 1 512 depends on !SOC_SERIES_STM32WBX && !SOC_SERIES_STM32WLX help AHB prescaler, allowed values: 1, 2, 4, 8, 16, 64, 128, 256, 512. config CLOCK_STM32_APB1_PRESCALER int "APB1 prescaler" default 1 range 1 16 help APB1 Low speed clock (PCLK1) prescaler, allowed values: 1, 2, 4, 8, 16 config CLOCK_STM32_APB2_PRESCALER int "APB2 prescaler" default 1 range 1 16 depends on !SOC_SERIES_STM32F0X && !SOC_SERIES_STM32G0X help APB2 High speed clock (PCLK2) prescaler, allowed values: 1, 2, 4, 8, 16 config CLOCK_STM32_CPU1_PRESCALER int "CPU1 HCLK prescaler" default 1 range 1 512 depends on SOC_SERIES_STM32WBX || SOC_SERIES_STM32WLX help CPU1 HCLK prescaler, allowed values: 1, 2, 3, 4, 5, 6, 8, 10, 16, 32, 64, 128, 256, 512. config CLOCK_STM32_CPU2_PRESCALER int "CPU2 HCLK prescaler" default 1 range 1 512 depends on SOC_SERIES_STM32WBX || SOC_SERIES_STM32WLX help CPU2 HCLK prescaler, allowed values: 1, 2, 3, 4, 5, 6, 8, 10, 16, 32, 64, 128, 256, 512. config CLOCK_STM32_AHB3_PRESCALER int "AHB3 HCLK prescaler" default 1 range 1 512 depends on SOC_SERIES_STM32WLX help HCLK4 prescaler, allowed values: 1, 2, 3, 4, 5, 6, 8, 10, 16, 32, 64, 128, 256, 512. config CLOCK_STM32_AHB4_PRESCALER int "AHB4 HCLK prescaler" default 1 range 1 512 depends on SOC_SERIES_STM32WBX help HCLK4 prescaler, allowed values: 1, 2, 3, 4, 5, 6, 8, 10, 16, 32, 64, 128, 256, 512. endif # !SOC_SERIES_STM32H7X && !SOC_SERIES_STM32MP1X endif # CLOCK_CONTROL_STM32_HAS_DTS # Micro-controller Clock output configuration options choice prompt "STM32 MCO1 Clock Source" default CLOCK_STM32_MCO1_SRC_NOCLOCK config CLOCK_STM32_MCO1_SRC_NOCLOCK bool "NOCLOCK" help MCO1 output disabled, no clock on MCO1 config CLOCK_STM32_MCO1_SRC_LSE bool "LSE" depends on SOC_SERIES_STM32F4X help Use LSE as source of MCO1 config CLOCK_STM32_MCO1_SRC_HSE bool "HSE" depends on SOC_SERIES_STM32F4X help Use HSE as source of MCO1 config CLOCK_STM32_MCO1_SRC_HSI bool "HSI" depends on SOC_SERIES_STM32F4X help Use HSI as source of MCO1 config CLOCK_STM32_MCO1_SRC_PLLCLK bool "PLLCLK" depends on SOC_SERIES_STM32F4X help Use PLLCLK as source of MCO1 endchoice config CLOCK_STM32_MCO1_DIV int "MCO1 prescaler" depends on !CLOCK_STM32_MCO1_SRC_NOCLOCK default 1 range 1 5 help allowed values: 1, 2, 3, 4, 5 choice prompt "STM32 MCO2 Clock Source" default CLOCK_STM32_MCO2_SRC_NOCLOCK config CLOCK_STM32_MCO2_SRC_NOCLOCK bool "NOCLOCK" help MCO2 output disabled, no clock on MCO2 config CLOCK_STM32_MCO2_SRC_SYSCLK bool "SYSCLK" depends on SOC_SERIES_STM32F4X help Use SYSCLK as source of MCO2 config CLOCK_STM32_MCO2_SRC_PLLI2S bool "PLLI2S" depends on SOC_SERIES_STM32F4X help Use PLLI2S as source of MCO2 config CLOCK_STM32_MCO2_SRC_HSE bool "HSE" depends on SOC_SERIES_STM32F4X help Use HSE as source of MCO2 config CLOCK_STM32_MCO2_SRC_PLLCLK bool "PLLCLK" depends on SOC_SERIES_STM32F4X help Use PLLCLK as source of MCO2 endchoice config CLOCK_STM32_MCO2_DIV int "MCO2 prescaler" depends on !CLOCK_STM32_MCO2_SRC_NOCLOCK default 1 range 1 5 help allowed values: 1, 2, 3, 4, 5 endif # CLOCK_CONTROL_STM32_CUBE |