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#size-cells = <0>; cpu0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-m4"; reg = <0>; }; }; flash0: flash@c0000 { reg = <0x000C0000 0x58000>; }; sram0: memory@118000 { compatible = "mmio-sram"; reg = <0x00118000 0x10000>; }; pinmux: pinmux { compatible = "microchip,xec-pinmux"; pinmux_000_036: pinmux-0 { ph-reg = <&gpio_000_036>; port-num = <0>; }; pinmux_040_076: pinmux-1 { ph-reg = <&gpio_040_076>; port-num = <1>; }; pinmux_100_136: pinmux-2 { ph-reg = <&gpio_100_136>; port-num = <2>; }; pinmux_140_176: pinmux-3 { ph-reg = <&gpio_140_176>; port-num = <3>; }; pinmux_200_236: pinmux-4 { ph-reg = <&gpio_200_236>; port-num = <4>; }; pinmux_240_276: pinmux-5 { ph-reg = <&gpio_240_276>; port-num = <5>; }; }; soc { ecs: ecs@4000fc00 { reg = <0x4000fc00 0x200>; label = "ECS"; }; pcr: pcr@40080100 { compatible = "microchip,xec-pcr"; reg = <0x40080100 0x100 0x4000a400 0x100>; reg-names = "pcrr", "vbatr"; interrupts = <174 0>; label = "PCR"; core-clock-div = <1>; pll-32k-src = <MCHP_XEC_CLK32K_SRC_SIL_OSC>; periph-32k-src = <MCHP_XEC_CLK32K_SRC_SIL_OSC>; #clock-cells = <2>; }; ecia: ecia@4000e000 { compatible = "microchip,xec-ecia"; reg = <0x4000e000 0x400>; direct-capable-girqs = <13 14 15 16 17 18 19 20 21 23>; clocks = <&pcr 1 0>; label = "ECIA_0"; #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x4000e000 0x400>; girq8: girq8@0 { compatible = "microchip,xec-ecia-girq"; reg = <0x0 0x14>; interrupts = <0 0>; label = "GIRQ_8"; girq-id = <0>; sources = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 21 22 24 25 26 27 28 29>; status = "disabled"; }; girq9: girq9@14 { compatible = "microchip,xec-ecia-girq"; reg = <0x14 0x14>; interrupts = <1 0>; label = "GIRQ_9"; girq-id = <1>; sources = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29>; status = "disabled"; }; girq10: girq10@28 { compatible = "microchip,xec-ecia-girq"; reg = <0x28 0x14>; interrupts = <2 0>; label = "GIRQ_10"; girq-id = <2>; sources = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30>; status = "disabled"; }; girq11: girq11@3c { compatible = "microchip,xec-ecia-girq"; reg = <0x3c 0x14>; interrupts = <3 0>; label = "GIRQ_11"; girq-id = <3>; sources = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30>; status = "disabled"; }; girq12: girq12@50 { compatible = "microchip,xec-ecia-girq"; reg = <0x50 0x14>; interrupts = <4 0>; label = "GIRQ_12"; girq-id = <4>; sources = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30>; status = "disabled"; }; girq13: girq13@64 { compatible = "microchip,xec-ecia-girq"; reg = <0x64 0x14>; interrupts = <5 0>; label = "GIRQ_13"; girq-id = <5>; sources = <0 1 2 3 4>; status = "disabled"; }; girq14: girq14@78 { compatible = "microchip,xec-ecia-girq"; reg = <0x78 0x14>; interrupts = <6 0>; label = "GIRQ_14"; girq-id = <6>; sources = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>; status = "disabled"; }; girq15: girq15@8c { compatible = "microchip,xec-ecia-girq"; reg = <0x8c 0x14>; interrupts = <7 0>; label = "GIRQ_15"; girq-id = <7>; sources = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 22>; status = "disabled"; }; girq16: girq16@a0 { compatible = "microchip,xec-ecia-girq"; reg = <0xa0 0x14>; interrupts = <8 0>; label = "GIRQ_16"; girq-id = <8>; sources = <0 2 3>; status = "disabled"; }; girq17: girq17@b4 { compatible = "microchip,xec-ecia-girq"; reg = <0xb4 0x14>; interrupts = <9 0>; label = "GIRQ_17"; girq-id = <9>; sources = <0 1 2 3 4 8 9 10 11 12 13 14 15 16 17 20 21 22 23>; status = "disabled"; }; girq18: girq18@c8 { compatible = "microchip,xec-ecia-girq"; reg = <0xc8 0x14>; interrupts = <10 0>; label = "GIRQ_18"; girq-id = <10>; sources = <0 1 2 3 4 5 6 7 10 20 21 22 23 24 25 26 27 28>; status = "disabled"; }; girq19: girq19@dc { compatible = "microchip,xec-ecia-girq"; reg = <0xdc 0x14>; interrupts = <11 0>; label = "GIRQ_19"; girq-id = <11>; sources = <0 1 2 3 4 5 6 7 8 9 10>; status = "disabled"; }; girq20: girq20@f0 { compatible = "microchip,xec-ecia-girq"; reg = <0xf0 0x14>; interrupts = <12 0>; label = "GIRQ_20"; girq-id = <12>; sources = <3 9>; status = "disabled"; }; girq21: girq21@104 { compatible = "microchip,xec-ecia-girq"; reg = <0x104 0x14>; interrupts = <13 0>; label = "GIRQ_21"; girq-id = <13>; sources = <2 3 4 5 6 7 8 9 10 11 12 13 14 15 18 19 25 26>; status = "disabled"; }; girq22: girq22@118 { compatible = "microchip,xec-ecia-girq"; reg = <0x118 0x14>; interrupts = <255 0>; label = "GIRQ_22"; girq-id = <14>; sources = <0 1 2 3 4 5 9 15>; status = "disabled"; }; girq23: girq23@12c { compatible = "microchip,xec-ecia-girq"; reg = <0x12c 0x14>; interrupts = <14 0>; label = "GIRQ_23"; girq-id = <15>; sources = <0 1 2 3 4 5 6 7 8 9 10 16 17>; status = "disabled"; }; girq24: girq24@140 { compatible = "microchip,xec-ecia-girq"; reg = <0x140 0x14>; interrupts = <15 0>; label = "GIRQ_24"; girq-id = <16>; sources = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27>; status = "disabled"; }; girq25: girq25@154 { compatible = "microchip,xec-ecia-girq"; reg = <0x154 0x14>; interrupts = <16 0>; label = "GIRQ_25"; girq-id = <17>; sources = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>; status = "disabled"; }; girq26: girq26@168 { compatible = "microchip,xec-ecia-girq"; reg = <0x168 0x14>; interrupts = <17 0>; label = "GIRQ_26"; girq-id = <18>; sources = <0 1 2 3 4 5 6 12 13>; status = "disabled"; }; }; gpio_000_036: gpio@40081000 { compatible = "microchip,xec-gpio-v2"; reg = < 0x40081000 0x80 0x40081300 0x04 0x40081380 0x04 0x400813fc 0x04>; interrupts = <3 2>; gpio-controller; label="GPIO000_036"; port-id = <0>; girq-id = <11>; #gpio-cells=<2>; }; gpio_040_076: gpio@40081080 { compatible = "microchip,xec-gpio-v2"; reg = < 0x40081080 0x80 0x40081304 0x04 0x40081384 0x04 0x400813f8 0x4>; interrupts = <2 2>; gpio-controller; label="GPIO040_076"; port-id = <1>; girq-id = <10>; #gpio-cells=<2>; }; gpio_100_136: gpio@40081100 { compatible = "microchip,xec-gpio-v2"; reg = < 0x40081100 0x80 0x40081308 0x04 0x40081388 0x04 0x400813f4 0x04>; gpio-controller; interrupts = <1 2>; label="GPIO100_136"; port-id = <2>; girq-id = <9>; #gpio-cells=<2>; }; gpio_140_176: gpio@40081180 { compatible = "microchip,xec-gpio-v2"; reg = < 0x40081180 0x80 0x4008130c 0x04 0x4008138c 0x04 0x400813f0 0x04>; gpio-controller; interrupts = <0 2>; label="GPIO140_176"; port-id = <3>; girq-id = <8>; #gpio-cells=<2>; }; gpio_200_236: gpio@40081200 { compatible = "microchip,xec-gpio-v2"; reg = < 0x40081200 0x80 0x40081310 0x04 0x40081390 0x04 0x400813ec 0x04>; gpio-controller; interrupts = <4 2>; label="GPIO200_236"; port-id = <4>; girq-id = <12>; #gpio-cells=<2>; }; gpio_240_276: gpio@40081280 { compatible = "microchip,xec-gpio-v2"; reg = < 0x40081280 0x80 0x40081314 0x04 0x40081394 0x04 0x400813e8 0x04>; gpio-controller; interrupts = <17 2>; label="GPIO240_276"; port-id = <5>; girq-id = <26>; #gpio-cells=<2>; }; wdog: watchdog@40000400 { reg = <0x40000400 0x400>; interrupts = <171 0>; girqs = <21 2>; pcrs = <1 9>; label = "WDT_0"; }; rtimer: timer@40007400 { compatible = "microchip,xec-rtos-timer"; reg = <0x40007400 0x10>; interrupts = <111 0>; label = "RTIMER"; girqs = <23 10>; }; timer0: timer@40000c00 { compatible = "microchip,xec-timer"; clock-frequency = <48000000>; reg = <0x40000c00 0x20>; interrupts = <136 0>; girqs = <23 0>; pcrs = <1 30>; label = "TIMER_0"; max-value = <0xFFFF>; prescaler = <0>; status = "disabled"; }; timer1: timer@40000c20 { compatible = "microchip,xec-timer"; clock-frequency = <48000000>; reg = <0x40000c20 0x20>; interrupts = <137 0>; girqs = <23 1>; pcrs = <1 31>; label = "TIMER_1"; max-value = <0xFFFF>; prescaler = <0>; status = "disabled"; }; timer2: timer@40000c40 { compatible = "microchip,xec-timer"; clock-frequency = <48000000>; reg = <0x40000c40 0x20>; interrupts = <138 0>; girqs = <23 2>; pcrs = <3 21>; label = "TIMER_2"; max-value = <0xFFFF>; prescaler = <0>; status = "disabled"; }; timer3: timer@40000c60 { compatible = "microchip,xec-timer"; clock-frequency = <48000000>; reg = <0x40000c60 0x20>; interrupts = <139 0>; girqs = <23 3>; pcrs = <3 22>; label = "TIMER_3"; max-value = <0xFFFF>; prescaler = <0>; status = "disabled"; }; /* * NOTE: When RTOS timer used as kernel timer, timer4 used * to provide high speed busy wait counter. Keep disabled to * prevent counter driver from claiming it. */ timer4: timer@40000c80 { compatible = "microchip,xec-timer"; clock-frequency = <48000000>; reg = <0x40000c80 0x20>; interrupts = <140 0>; girqs = <23 4>; pcrs = <3 23>; label = "TIMER_4"; max-value = <0xFFFFFFFF>; prescaler = <0>; status = "disabled"; }; timer5: timer@40000ca0 { compatible = "microchip,xec-timer"; clock-frequency = <48000000>; reg = <0x40000ca0 0x20>; interrupts = <141 0>; girqs = <23 5>; pcrs = <3 24>; label = "TIMER_5"; max-value = <0xFFFFFFFF>; prescaler = <0>; status = "disabled"; }; cntr0: timer@40000d00 { reg = <0x40000d00 0x20>; interrupts = <142 0>; girqs = <23 6>; pcrs = <4 2>; label = "EVTMR_0"; status = "disabled"; }; cntr1: timer@40000d20 { reg = <0x40000d20 0x20>; interrupts = <143 0>; girqs = <23 7>; pcrs = <4 3>; label = "EVTMR_1"; status = "disabled"; }; cntr2: timer@40000d40 { reg = <0x40000d40 0x20>; interrupts = <144 0>; girqs = <23 8>; pcrs = <4 3>; label = "EVTMR_2"; status = "disabled"; }; cntr3: timer@40000d60 { reg = <0x40000d60 0x20>; interrupts = <145 0>; girqs = <23 9>; pcrs = <4 4>; label = "EVTMR_3"; status = "disabled"; }; cctmr0: timer@40001000 { reg = <0x40001000 0x40>; interrupts = <146 0>, <147 0>, <148 0>, <149 0>, <150 0>, <151 0>, <152 0>, <153 0>, <154 0>; girqs = <18 20>, <18 21>, <18 22>, <18 23>, <18 24>, <18 25>, <18 26>, <18 27>, <18 28>; pcrs = <3 30>; label = "CCTMR_0"; status = "disabled"; }; hibtimer0: timer@40009800 { reg = <0x40009800 0x20>; interrupts = <112 0>; girqs = <23 16>; label = "HIBTIMER_0"; }; hibtimer1: timer@40009820 { reg = <0x40009820 0x20>; interrupts = <113 0>; girqs = <23 17>; label = "HIBTIMER_1"; }; weektmr0: timer@4000ac80 { reg = <0x4000ac80 0x80>; interrupts = <114 0>, <115 0>, <116 0>, <117 0>, <118 0>; girqs = <21 3>, <21 4>, <21 5>, <21 6>, <21 7>; label = "WEEKTMR_0"; status = "disabled"; }; vbm0: vbm@4000a800 { reg = <0x4000a800 0x100>; label = "VBM_0"; }; vci0: vci@4000ae00 { reg = <0x4000ae00 0x40>; interrupts = <121 0>, <122 0>, <123 0>, <124 0>, <125 0>; girqs = <21 10>, <21 11>, <21 12>, <21 13>, <21 14>; label = "VCI_0"; status = "disabled"; }; dmac: dmac@40002400 { reg = <0x40002400 0xc00>; interrupts = <24 0>, <25 0>, <26 0>, <27 0>, <28 0>, <29 0>, <30 0>, <31 0>, <32 0>, <33 0>, <34 0>, <35 0>, <36 0>, <37 0>, <38 0>, <39 0>; girqs = <14 0>, <14 1>, <14 2>, <14 3>, <14 4>, <14 5>, <14 6>, <14 7>, <14 8>, <14 9>, <14 10>, <14 11>, <14 12>, <14 13>, <14 14>, <14 15>; pcrs = <1 6>; label = "DMA_0"; #dma-cells = <2>; status = "disabled"; }; i2c_smb_0: i2c@40004000 { compatible = "microchip,xec-i2c-v2"; reg = <0x40004000 0x80>; clock-frequency = <I2C_BITRATE_STANDARD>; interrupts = <20 1>; girqs = <13 0>; pcrs = <1 10>; label = "I2C_SMB_0"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; i2c_smb_1: i2c@40004400 { compatible = "microchip,xec-i2c-v2"; reg = <0x40004400 0x80>; clock-frequency = <I2C_BITRATE_STANDARD>; interrupts = <21 1>; girqs = <13 1>; pcrs = <3 13>; label = "I2C_SMB_1"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; i2c_smb_2: i2c@40004800 { compatible = "microchip,xec-i2c-v2"; reg = <0x40004800 0x80>; clock-frequency = <I2C_BITRATE_STANDARD>; interrupts = <22 1>; girqs = <13 2>; pcrs = <3 14>; label = "I2C_SMB_2"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; i2c_smb_3: i2c@40004c00 { compatible = "microchip,xec-i2c-v2"; reg = <0x40004C00 0x80>; clock-frequency = <I2C_BITRATE_STANDARD>; interrupts = <23 1>; girqs = <13 3>; pcrs = <3 15>; label = "I2C_SMB_3"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; i2c_smb_4: i2c@40005000 { compatible = "microchip,xec-i2c-v2"; reg = <0x40005000 0x80>; clock-frequency = <I2C_BITRATE_STANDARD>; interrupts = <158 1>; girqs = <13 4>; pcrs = <3 20>; label = "I2C_SMB_4"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; uart0: uart@400f2400 { compatible = "microchip,xec-uart"; reg = <0x400f2400 0x400>; interrupts = <40 0>; clock-frequency = <1843200>; current-speed = <38400>; label = "UART_0"; girqs = <15 0>; pcrs = <2 1>; status = "disabled"; }; uart1: uart@400f2800 { compatible = "microchip,xec-uart"; reg = <0x400f2800 0x400>; interrupts = <41 0>; clock-frequency = <1843200>; current-speed = <38400>; label = "UART_1"; girqs = <15 1>; pcrs = <2 2>; status = "disabled"; }; ps2_0: ps2@40009000 { reg = <0x40009000 0x40>; interrupts = <100 1>; girqs = <18 10>; pcrs = <3 5>; label = "PS2_0"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; pwm0: pwm@40005800 { reg = <0x40005800 0x20>; pcrs = <1 4>; label = "PWM_0"; status = "disabled"; #pwm-cells = <1>; }; pwm1: pwm@40005810 { reg = <0x40005810 0x20>; pcrs = <1 20>; label = "PWM_1"; status = "disabled"; #pwm-cells = <1>; }; pwm2: pwm@40005820 { reg = <0x40005820 0x20>; pcrs = <1 21>; label = "PWM_2"; status = "disabled"; #pwm-cells = <1>; }; pwm3: pwm@40005830 { reg = <0x40005830 0x20>; pcrs = <1 22>; label = "PWM_3"; status = "disabled"; #pwm-cells = <1>; }; pwm4: pwm@40005840 { reg = <0x40005840 0x20>; pcrs = <1 23>; label = "PWM_4"; status = "disabled"; #pwm-cells = <1>; }; pwm5: pwm@40005850 { reg = <0x40005850 0x20>; pcrs = <1 24>; label = "PWM_5"; status = "disabled"; #pwm-cells = <1>; }; pwm6: pwm@40005860 { reg = <0x40005860 0x20>; pcrs = <1 25>; label = "PWM_6"; status = "disabled"; #pwm-cells = <1>; }; pwm7: pwm@40005870 { reg = <0x40005870 0x20>; pcrs = <1 26>; label = "PWM_7"; status = "disabled"; #pwm-cells = <1>; }; pwm8: pwm@40005880 { reg = <0x40005880 0x20>; pcrs = <1 27>; label = "PWM_8"; status = "disabled"; #pwm-cells = <1>; }; tach0: tach@40006000 { reg = <0x40006000 0x10>; interrupts = <71 4>; girqs = <17 1>; pcrs = <1 2>; label = "TACH_0"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; tach1: tach@40006010 { reg = <0x40006010 0x10>; interrupts = <72 4>; girqs = <17 2>; pcrs = <1 11>; label = "TACH_1"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; tach2: tach@40006020 { reg = <0x40006020 0x10>; interrupts = <73 4>; girqs = <17 3>; pcrs = <1 12>; label = "TACH_2"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; tach3: tach@40006030 { reg = <0x40006030 0x10>; interrupts = <159 4>; girqs = <17 4>; pcrs = <1 13>; label = "TACH_3"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; rpmfan0: rpmfan@4000a000 { reg = <0x4000a000 0x80>; interrrupts = <74 1>, <75 1>; girqs = <17 20>, <17 21>; pcrs = <3 12>; label = "RPMFAN_0"; status = "disabled"; }; rpmfan1: rpmfan@4000a080 { reg = <0x4000a080 0x80>; interrrupts = <76 1>, <77 1>; girqs = <17 22>, <17 23>; pcrs = <4 7>; label = "RPMFAN_1"; status = "disabled"; }; adc0: adc@40007c00 { compatible = "microchip,xec-adc-v2"; reg = <0x40007c00 0x90>; interrupts = <78 0>, <79 0>; girqs = <17 8>, <17 9>; pcrs = <3 3>; label = "ADC_0"; status = "disabled"; #io-channel-cells = <1>; }; kscan0: kscan@40009c00 { reg = <0x40009c00 0x18>; interrupts = <135 0>; girqs = <21 25>; pcrs = <3 11>; label = "KSCAN"; status = "disabled"; #address-cells = <1>; #size-cells = <0>; }; peci0: peci@40006400 { reg = <0x40006400 0x80>; interrupts = <70 4>; girqs = <17 0>; pcrs = <1 1>; label = "PECI_0"; #address-cells = <1>; #size-cells = <0>; }; spi0: spi@40070000 { reg = <0x40070000 0x400>; interrupts = <91 2>; girqs = <18 1>; pcrs = <4 8>; clock-frequency = <12000000>; label = "SPI_0"; ldmas = <3 3>; lines = <1>; chip_select = <0>; dcsckon = <6>; dckcsoff = <4>; dldh = <6>; dcsda = <6>; #address-cells = <1>; #size-cells = <0>; #ldma-cells = <2>; #legdma-cells = <2>; status = "disabled"; }; spi1: spi@40009400 { reg = <0x40009400 0x80>; interrupts = <92 2>, <93 2>; girqs = <18 2>, <18 3>; pcrs = <3 9>; label = "SPI_1"; status = "disabled"; }; spi2: spi@40009480 { reg = <0x40009480 0x80>; interrupts = <94 2>, <95 2>; girqs = <18 4>, <18 5>; pcrs = <4 22>; label = "SPI_2"; status = "disabled"; }; prochot0: prochot@40003400 { reg = <0x40003400 0x20>; interrupts = <87 0>; girqs = <17 17>; pcrs = <4 13>; label = "PROCHOT_0"; status = "disabled"; }; rcid0: rcid@40001400 { reg = <0x40001400 0x80>; interrupts = <80 0>; girqs = <17 10>; pcrs = <4 10>; label = "RCID_0"; status = "disabled"; }; rcid1: rcid@40001480 { reg = <0x40001480 0x80>; interrupts = <81 0>; girqs = <17 11>; pcrs = <4 11>; label = "RCID_1"; status = "disabled"; }; rcid2: rcid@40001500 { reg = <0x40001500 0x80>; interrupts = <82 0>; girqs = <17 12>; pcrs = <4 12>; label = "RCID_2"; status = "disabled"; }; spip0: spip@40007000 { reg = <0x40007000 0x100>; interrupts = <90 0>; girqs = <18 0>; pcrs = <4 16>; label = "SPIP_0"; status = "disabled"; }; bbled0: bbled@4000b800 { reg = <0x4000b800 0x100>; interrupts = <83 0>; girqs = <17 13>; pcrs = <3 16>; label = "BBLED_0"; status = "disabled"; }; bbled1: bbled@4000b900 { reg = <0x4000b900 0x100>; interrupts = <84 0>; girqs = <17 14>; pcrs = <3 17>; label = "BBLED_1"; status = "disabled"; }; bbled2: bbled@4000ba00 { reg = <0x4000ba00 0x100>; interrupts = <85 0>; girqs = <17 15>; pcrs = <3 18>; label = "BBLED_2"; status = "disabled"; }; bbled3: bbled@4000bb00 { reg = <0x4000bb00 0x100>; interrupts = <86 0>; girqs = <17 16>; pcrs = <3 25>; label = "BBLED_3"; status = "disabled"; }; bclink0: bclink@4000cd00 { reg = <0x4000cd00 0x20>; interrupts = <96 0>, <97 0>; girqs = <18 7>, <18 6>; pcrs = <3 19>; label = "BCLINK_0"; status = "disabled"; }; mbox0: mbox@400f0000 { reg = <0x400f0000 0x200>; interrupts = <60 0>; girqs = <15 20>; pcrs = <2 17>; label = "MBOX_0"; status = "disabled"; }; emi0: emi@400f4000 { reg = <0x400f4000 0x400>; interrupts = <42 0>; girqs = <15 2>; label = "EMI_0"; status = "disabled"; }; emi1: emi@400f4400 { reg = <0x400f4400 0x400>; interrupts = <43 0>; girqs = <15 3>; label = "EMI_1"; status = "disabled"; }; emi2: emi@400f4800 { reg = <0x400f4800 0x400>; interrupts = <44 0>; girqs = <15 4>; label = "EMI_2"; status = "disabled"; }; rtc0: rtc@400f5000 { reg = <0x400f5000 0x100>; interrupts = <119 0>, <120 0>; girqs = <21 8>, <21 9>; pcrs = <2 18>; label = "RTC_0"; status = "disabled"; }; p80bd0: p80bd@400f8000 { reg = <0x400f8000 0x800>; interrupts = <62 0>; girqs = <15 22>; pcrs = <2 25>; label = "P80BD_0"; status = "disabled"; }; tfdp0: tfdp@40008c00 { reg = <0x40008c00 0x10>; pcrs = <1 7>; label = "TFDP_0"; status = "disabled"; }; glblcfg0: glblcfg@400fff00 { reg = <0x400fff00 0x40>; pcrs = <2 12>; label = "GLBLCFG_0"; status = "disabled"; }; }; }; &nvic { arm,num-irq-priority-bits = <3>; }; &systick { status = "disabled"; }; |