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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 | /* * Copyright (c) 2019 Linaro Limited * * SPDX-License-Identifier: Apache-2.0 */ /dts-v1/; #include <st/h7/stm32h747Xi_m7.dtsi> #include <st/h7/stm32h747xihx-pinctrl.dtsi> #include "stm32h747i_disco.dtsi" / { model = "STMicroelectronics STM32H747I DISCOVERY board"; compatible = "st,stm32h747i-disco"; /* HW resources are split between CM7 and CM4 */ chosen { zephyr,console = &usart1; zephyr,shell-uart = &usart1; zephyr,sram = &sram0; zephyr,flash = &flash0; }; sdram2: sdram@d0000000 { device_type = "memory"; reg = <0xd0000000 DT_SIZE_M(32)>; }; leds { green_led_1:led_1 { status = "okay"; }; orange_led_2:led_2 { status = "okay"; }; }; gpio_keys { wake_up: button { status = "okay"; }; }; aliases { led0 = &green_led_1; led1 = &orange_led_2; sw0 = &wake_up; }; }; &clk_hse { clock-frequency = <DT_FREQ_M(25)>; status = "okay"; }; &pll { div-m = <5>; mul-n = <160>; div-p = <2>; div-q = <4>; div-r = <2>; clocks = <&clk_hse>; status = "okay"; }; &rcc { clocks = <&pll>; clock-frequency = <DT_FREQ_M(400)>; }; &usart1 { status = "okay"; }; &uart8 { /* status = "okay"; */ }; &spi5 { status = "okay"; }; &flash0 { partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; /* Set 2KB of storage at the end of first 1MB flash */ storage_partition: partition@ff800 { label = "storage"; reg = <0x000ff800 0x00000800>; }; }; }; &mac { /* * From UM2411 Rev 4: * With the default setting, the Ethernet feature is not working due * of a pin conflict between ETH_MDC and SAI4_D1 of the MEMs digital * microphone. * Cf Ethernet section in board documentation for more information on * the hw modification to be done to enable it. */ status = "okay"; pinctrl-0 = <ð_ref_clk_pa1 ð_mdio_pa2 ð_crs_dv_pa7 ð_mdc_pc1 ð_rxd0_pc4 ð_rxd1_pc5 ð_tx_en_pg11 ð_txd0_pg13 ð_txd1_pg12>; }; &rng { status = "okay"; }; &fmc { status = "okay"; pinctrl-0 = <&fmc_nbl0_pe0 &fmc_nbl1_pe1 &fmc_nbl2_pi4 &fmc_nbl3_pi5 &fmc_sdclk_pg8 &fmc_sdnwe_ph5 &fmc_sdcke1_ph7 &fmc_sdne1_ph6 &fmc_sdnras_pf11 &fmc_sdncas_pg15 &fmc_a0_pf0 &fmc_a1_pf1 &fmc_a2_pf2 &fmc_a3_pf3 &fmc_a4_pf4 &fmc_a5_pf5 &fmc_a6_pf12 &fmc_a7_pf13 &fmc_a8_pf14 &fmc_a9_pf15 &fmc_a10_pg0 &fmc_a11_pg1 &fmc_a12_pg2 &fmc_a14_pg4 &fmc_a15_pg5 &fmc_d0_pd14 &fmc_d1_pd15 &fmc_d2_pd0 &fmc_d3_pd1 &fmc_d4_pe7 &fmc_d5_pe8 &fmc_d6_pe9 &fmc_d7_pe10 &fmc_d8_pe11 &fmc_d9_pe12 &fmc_d10_pe13 &fmc_d11_pe14 &fmc_d12_pe15 &fmc_d13_pd8 &fmc_d14_pd9 &fmc_d15_pd10 &fmc_d16_ph8 &fmc_d17_ph9 &fmc_d18_ph10 &fmc_d19_ph11 &fmc_d20_ph12 &fmc_d21_ph13 &fmc_d22_ph14 &fmc_d23_ph15 &fmc_d24_pi0 &fmc_d25_pi1 &fmc_d26_pi2 &fmc_d27_pi3 &fmc_d28_pi6 &fmc_d29_pi7 &fmc_d30_pi9 &fmc_d31_pi10>; sdram { status = "okay"; power-up-delay = <100>; num-auto-refresh = <8>; mode-register = <0x220>; refresh-rate = <603>; bank@1 { reg = <1>; st,sdram-control = <STM32_FMC_SDRAM_NC_9 STM32_FMC_SDRAM_NR_12 STM32_FMC_SDRAM_MWID_32 STM32_FMC_SDRAM_NB_4 STM32_FMC_SDRAM_CAS_2 STM32_FMC_SDRAM_SDCLK_PERIOD_2 STM32_FMC_SDRAM_RBURST_ENABLE STM32_FMC_SDRAM_RPIPE_0>; st,sdram-timing = <2 6 4 6 2 2 2>; }; }; }; &sdmmc1 { status = "okay"; pinctrl-0 = <&sdmmc1_d0_pc8 &sdmmc1_d1_pc9 &sdmmc1_d2_pc10 &sdmmc1_d3_pc11 &sdmmc1_ck_pc12 &sdmmc1_cmd_pd2>; cd-gpios = <&gpioi 8 GPIO_ACTIVE_LOW>; }; arduino_spi: &spi5 {}; |