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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 | /* * Copyright (c) 2017 Linaro Limited * * SPDX-License-Identifier: Apache-2.0 */ /dts-v1/; #include <st/l4/stm32l432Xc.dtsi> #include <st/l4/stm32l432k(b-c)ux-pinctrl.dtsi> / { model = "STMicroelectronics STM32L432KC-NUCLEO board"; compatible = "st,stm32l432kc-nucleo"; chosen { zephyr,console = &usart2; zephyr,shell-uart = &usart2; zephyr,sram = &sram0; zephyr,flash = &flash0; zephyr,can-primary = &can1; }; leds { compatible = "gpio-leds"; green_led: led_0 { gpios = <&gpiob 3 GPIO_ACTIVE_HIGH>; label = "User LD3"; }; }; aliases { led0 = &green_led; }; }; &clk_hsi { status = "okay"; }; &pll { div-m = <1>; mul-n = <20>; div-p = <7>; div-q = <2>; div-r = <4>; clocks = <&clk_hsi>; status = "okay"; }; &rcc { clocks = <&pll>; clock-frequency = <DT_FREQ_M(80)>; ahb-prescaler = <1>; apb1-prescaler = <1>; apb2-prescaler = <1>; }; &usart1 { pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>; current-speed = <115200>; }; &usart2 { pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa15>; current-speed = <115200>; status = "okay"; }; &spi1 { pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>; status = "okay"; }; &i2c1 { pinctrl-0 = <&i2c1_scl_pb6 &i2c1_sda_pb7>; clock-frequency = <I2C_BITRATE_FAST>; status = "okay"; }; &timers2 { status = "okay"; pwm2: pwm { status = "okay"; pinctrl-0 = <&tim2_ch1_pa0>; }; }; &can1 { pinctrl-0 = <&can1_rx_pa11 &can1_tx_pa12>; bus-speed = <125000>; status = "okay"; }; &rtc { status = "okay"; }; &lptim1 { status = "okay"; }; &flash0 { partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; /* * Reserve the final 16 KiB for file system partition */ storage_partition: partition@3c000 { label = "storage"; reg = <0x0003c000 0x00004000>; }; }; }; |