Defined in 3 files as a macro:

• include/toolchain/gcc.h, line 294 (as a macro)
• include/toolchain/gcc.h, line 319 (as a macro)
• include/toolchain/mwdt.h, line 59 (as a macro)

Referenced in 25 files:

• arch/arc/core/cpu_idle.S, line 23
• arch/arc/core/reset.S
  • line 20
  • line 21
  • line 22
• arch/arc/core/secureshield/arc_secure.S, line 44
• arch/arm/core/aarch32/cortex_a_r/exc_exit.S, line 27
• arch/arm/core/aarch32/cortex_a_r/reset.S
  • line 25
  • line 26
  • line 27
  • line 28
  • line 29
  • line 30
• arch/arm/core/aarch32/cortex_a_r/vector_table.h, line 32
• arch/arm/core/aarch32/cortex_m/__aeabi_read_tp.S, line 13
• arch/arm/core/aarch32/cortex_m/exc_exit.S, line 25
• arch/arm/core/aarch32/cortex_m/reset.S
  • line 23
  • line 29
• arch/arm/core/aarch32/cortex_m/vector_table.S, line 30
• arch/arm/core/aarch32/cortex_m/vector_table.h, line 31
• arch/arm/core/aarch32/irq_relay.S
  • line 29
  • line 30
  • line 77
• arch/arm/core/aarch32/isr_wrapper.S, line 29
• arch/arm/core/aarch32/swap_helper.S
  • line 35
  • line 38
• arch/arm/core/aarch32/userspace.S
  • line 29
  • line 32
• arch/arm64/core/isr_wrapper.S, line 21
• arch/arm64/core/vector_table.S, line 106
• arch/riscv/core/isr.S, line 220
• arch/riscv/core/userspace.S, line 27
• arch/x86/core/ia32/crt0.S
  • line 35
  • line 36
  • line 37
  • line 39
  • line 44
• arch/x86/core/ia32/swap.S, line 30
• arch/x86/core/ia32/userspace.S, line 23
• include/linker/linker-defs.h
  • line 172
  • line 173
  • line 175
  • line 176
  • line 177
• include/toolchain/gcc.h, line 324
• soc/arm/ti_lm3s6965/reboot.S, line 14