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/* * Copyright (c) 2020 Teslabs Engineering S.L. * * SPDX-License-Identifier: Apache-2.0 */ #include <st/h7/stm32h7.dtsi> / { soc { flash-controller@52002000 { flash0: flash@8000000 { write-block-size = <32>; erase-block-size = <DT_SIZE_K(128)>; }; }; }; /* system data RAM accessible over over AXI bus */ sram0: memory@24000000 { compatible = "mmio-sram"; reg = <0x24000000 DT_SIZE_K(512)>; }; dtcm: memory@20000000 { compatible = "arm,dtcm"; reg = <0x20000000 DT_SIZE_K(128)>; }; }; |