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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 | /* * Copyright (c) 2018, Cypress * * SPDX-License-Identifier: Apache-2.0 */ #include <mem.h> #include <dt-bindings/gpio/gpio.h> / { cpus { #address-cells = <1>; #size-cells = <0>; cpu@0 { device_type = "cpu"; compatible = "arm,cortex-m0+"; reg = <0>; }; cpu@1 { device_type = "cpu"; compatible = "arm,cortex-m4f"; reg = <1>; }; }; flash-controller@40250000 { compatible = "cypress,psoc6-flash-controller"; reg = <0x40250000 0x10000>; #address-cells = <1>; #size-cells = <1>; label="CYPRESS_FLASH_DRV_NAME"; flash0: flash@10000000 { compatible = "soc-nv-flash"; label = "FLASH_0"; reg = <0x10000000 DT_SIZE_K(384)>; write-block-size = <4>; }; flash1: flash@10060000 { compatible = "soc-nv-flash"; label = "FLASH_1"; reg = <0x10060000 DT_SIZE_K(640)>; write-block-size = <4>; }; }; sram0: memory@8000000 { compatible = "mmio-sram"; reg = <0x08000000 DT_SIZE_K(140)>; }; sram1: memory@8023000 { compatible = "mmio-sram"; reg = <0x08023000 DT_SIZE_K(4)>; }; sram2: memory@8024000 { compatible = "mmio-sram"; reg = <0x08024000 DT_SIZE_K(112)>; }; soc { hsiom: hsiom@40310000 { compatible = "cypress,psoc6-hsiom"; reg = <0x40310000 0x2024>; interrupts = <15 1>, <16 1>; label = "HSIOM"; status = "disabled"; }; gpio_prt0: gpio@40320000 { compatible = "cypress,psoc6-gpio"; reg = <0x40320000 0x80>; interrupts = <0 1>; label = "P0"; gpio-controller; ngpios = <6>; #gpio-cells = <2>; status = "disabled"; }; gpio_prt1: gpio@40320080 { compatible = "cypress,psoc6-gpio"; reg = <0x40320080 0x80>; interrupts = <1 1>; label = "P1"; gpio-controller; ngpios = <6>; #gpio-cells = <2>; status = "disabled"; }; gpio_prt2: gpio@40320100 { compatible = "cypress,psoc6-gpio"; reg = <0x40320100 0x80>; interrupts = <2 1>; label = "P2"; gpio-controller; ngpios = <8>; #gpio-cells = <2>; status = "disabled"; }; gpio_prt3: gpio@40320180 { compatible = "cypress,psoc6-gpio"; reg = <0x40320180 0x80>; interrupts = <3 1>; label = "P3"; gpio-controller; ngpios = <6>; #gpio-cells = <2>; status = "disabled"; }; gpio_prt4: gpio@40320200 { compatible = "cypress,psoc6-gpio"; reg = <0x40320200 0x80>; interrupts = <4 1>; label = "P4"; gpio-controller; ngpios = <4>; #gpio-cells = <2>; status = "disabled"; }; gpio_prt5: gpio@40320280 { compatible = "cypress,psoc6-gpio"; reg = <0x40320280 0x80>; interrupts = <5 1>; label = "P5"; gpio-controller; ngpios = <8>; #gpio-cells = <2>; status = "disabled"; }; gpio_prt6: gpio@40320300 { compatible = "cypress,psoc6-gpio"; reg = <0x40320300 0x80>; interrupts = <6 1>; label = "P6"; gpio-controller; ngpios = <8>; #gpio-cells = <2>; status = "disabled"; }; gpio_prt7: gpio@40320380 { compatible = "cypress,psoc6-gpio"; reg = <0x40320380 0x80>; interrupts = <7 1>; label = "P7"; gpio-controller; ngpios = <8>; #gpio-cells = <2>; status = "disabled"; }; gpio_prt8: gpio@40320400 { compatible = "cypress,psoc6-gpio"; reg = <0x40320400 0x80>; interrupts = <8 1>; label = "P8"; gpio-controller; ngpios = <8>; #gpio-cells = <2>; status = "disabled"; }; gpio_prt9: gpio@40320480 { compatible = "cypress,psoc6-gpio"; reg = <0x40320480 0x80>; interrupts = <9 1>; label = "P9"; gpio-controller; ngpios = <8>; #gpio-cells = <2>; status = "disabled"; }; gpio_prt10: gpio@40320500 { compatible = "cypress,psoc6-gpio"; reg = <0x40320500 0x80>; interrupts = <10 1>; label = "P10"; gpio-controller; ngpios = <8>; #gpio-cells = <2>; status = "disabled"; }; gpio_prt11: gpio@40320580 { compatible = "cypress,psoc6-gpio"; reg = <0x40320580 0x80>; interrupts = <11 1>; label = "P11"; gpio-controller; ngpios = <8>; #gpio-cells = <2>; status = "disabled"; }; gpio_prt12: gpio@40320600 { compatible = "cypress,psoc6-gpio"; reg = <0x40320600 0x80>; interrupts = <12 1>; label = "P12"; gpio-controller; ngpios = <8>; #gpio-cells = <2>; status = "disabled"; }; gpio_prt13: gpio@40320680 { compatible = "cypress,psoc6-gpio"; reg = <0x40320680 0x80>; interrupts = <13 1>; label = "P13"; gpio-controller; ngpios = <8>; #gpio-cells = <2>; status = "disabled"; }; gpio_prt14: gpio@40320700 { compatible = "cypress,psoc6-gpio"; reg = <0x40320700 0x80>; interrupts = <14 1>; label = "P14"; gpio-controller; ngpios = <2>; #gpio-cells = <2>; status = "disabled"; }; uart5: uart@40660000 { compatible = "cypress,psoc6-uart"; reg = <0x40660000 0x10000>; interrupts = <2 1>; status = "disabled"; label = "uart_5"; }; uart6: uart@40670000 { compatible = "cypress,psoc6-uart"; reg = <0x40670000 0x10000>; interrupts = <2 1>; status = "disabled"; label = "uart_6"; }; uid: device_uid@16000600 { compatible = "cypress,psoc6-uid"; reg = <0x16000600 0xb>; status = "okay"; }; }; }; |