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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 | /* * Copyright (c) 2019 Intel Corporation. * * SPDX-License-Identifier: Apache-2.0 */ #include <xtensa/xtensa.dtsi> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/i2c/i2c.h> #include <dt-bindings/clock/esp32_clock.h> / { chosen { zephyr,entropy = &trng0; }; cpus { #address-cells = <1>; #size-cells = <0>; cpu0: cpu@0 { device_type = "cpu"; compatible = "cadence,tensilica-xtensa-lx6"; reg = <0>; clock-source = <ESP32_CLK_SRC_PLL>; }; cpu1: cpu@1 { device_type = "cpu"; compatible = "cadence,tensilica-xtensa-lx6"; reg = <1>; clock-source = <ESP32_CLK_SRC_PLL>; }; }; sram0: memory@3ffb0000 { compatible = "mmio-sram"; reg = <0x3FFB0000 0x50000>; }; rtc: rtc@3ff48000 { compatible = "espressif,esp32-rtc"; reg = <0x3ff48000 0x0D8>; label = "RTC"; xtal-freq = <ESP32_CLK_XTAL_40M>; xtal-div = <0>; #clock-cells = <1>; status = "ok"; }; soc { uart0: uart@3ff40000 { compatible = "espressif,esp32-uart"; reg = <0x3ff40000 0x400>; /* interrupts = <12>; - FIXME: Enable interrupts when interrupt-controller got supported in device tree */ label = "UART_0"; clocks = <&rtc ESP32_UART0_MODULE>; status = "disabled"; }; uart1: uart@3ff50000 { compatible = "espressif,esp32-uart"; reg = <0x3ff50000 0x400>; /* interrupts = <17>; - FIXME: Enable interrupts when interrupt-controller got supported in device tree */ label = "UART_1"; clocks = <&rtc ESP32_UART1_MODULE>; status = "disabled"; }; uart2: uart@3ff6e000 { compatible = "espressif,esp32-uart"; reg = <0x3ff6E000 0x400>; /* interrupts = <18>; - FIXME: Enable interrupts when interrupt-controller got supported in device tree */ label = "UART_2"; clocks = <&rtc ESP32_UART2_MODULE>; status = "disabled"; }; pinmux: pinmux@3ff49000 { compatible = "espressif,esp32-pinmux"; reg = <0x3ff49000 0x94>; }; gpio0: gpio@3ff44000 { compatible = "espressif,esp32-gpio"; gpio-controller; #gpio-cells = <2>; reg = <0x3ff44000 0x800>; label = "GPIO_0"; ngpios = <32>; /* 0..31 */ }; gpio1: gpio@3ff44800 { compatible = "espressif,esp32-gpio"; gpio-controller; #gpio-cells = <2>; reg = <0x3ff44800 0x800>; label = "GPIO_1"; ngpios = <8>; /* 32..39 */ }; i2c0: i2c@3ff53000 { compatible = "espressif,esp32-i2c"; #address-cells = <1>; #size-cells = <0>; reg = <0x3ff53000 0x1000>; /* interrupts = <8>; - FIXME: Enable interrupts when interrupt-controller got supported in device tree */ label = "I2C_0"; clocks = <&rtc ESP32_I2C_EXT0_MODULE>; status = "disabled"; }; i2c1: i2c@3ff67000 { compatible = "espressif,esp32-i2c"; #address-cells = <1>; #size-cells = <0>; reg = <0x3ff67000 0x1000>; /* interrupts = <9>; - FIXME: Enable interrupts when interrupt-controller got supported in device tree */ label = "I2C_1"; clocks = <&rtc ESP32_I2C_EXT1_MODULE>; status = "disabled"; }; trng0: trng@3ff75144 { compatible = "espressif,esp32-trng"; reg = <0x3FF75144 0x4>; /* interrupts = <33 0>; - FIXME: Enable interrupts when interrupt-controller got supported in device tree */ label = "TRNG_0"; status = "disabled"; }; wdt0: watchdog@3ff5f048 { compatible = "espressif,esp32-watchdog"; reg = <0x3ff5f048 0x20>; /* interrupts = <24>; - FIXME: Enable interrupts when interrupt-controller got supported in device tree */ label = "WDT_0"; status = "okay"; }; wdt1: watchdog@3ff60048 { compatible = "espressif,esp32-watchdog"; reg = <0x3ff60048 0x20>; /* interrupts = <25>; - FIXME: Enable interrupts when interrupt-controller got supported in device tree */ label = "WDT_1"; status = "disabled"; }; }; }; |