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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 | /* * Copyright (c) 2019 Nordic Semiconductor ASA * * SPDX-License-Identifier: Apache-2.0 */ #include <arm/armv7-m.dtsi> #include <dt-bindings/i2c/i2c.h> #include <dt-bindings/gpio/gpio.h> #include "nrf5_common.dtsi" / { chosen { zephyr,entropy = &rng; zephyr,flash-controller = &flash_controller; }; cpus { #address-cells = <1>; #size-cells = <0>; cpu@0 { device_type = "cpu"; compatible = "arm,cortex-m4"; reg = <0>; }; }; soc { flash_controller: flash-controller@4001e000 { compatible = "nordic,nrf52-flash-controller"; reg = <0x4001e000 0x1000>; #address-cells = <1>; #size-cells = <1>; label="NRF_FLASH_DRV_NAME"; flash0: flash@0 { compatible = "soc-nv-flash"; label = "NRF_FLASH"; erase-block-size = <4096>; write-block-size = <4>; }; }; sram0: memory@20000000 { compatible = "mmio-sram"; }; adc: adc@40007000 { compatible = "nordic,nrf-saadc"; reg = <0x40007000 0x1000>; interrupts = <7 1>; status = "disabled"; label = "ADC_0"; #io-channel-cells = <1>; }; clock: clock@40000000 { compatible = "nordic,nrf-clock"; reg = <0x40000000 0x1000>; interrupts = <0 1>; status = "okay"; label = "CLOCK"; }; uart0: uart@40002000 { /* uart can be either UART or UARTE, for the user to pick */ /* compatible = "nordic,nrf-uarte" or "nordic,nrf-uart"; */ reg = <0x40002000 0x1000>; interrupts = <2 1>; status = "disabled"; label = "UART_0"; }; gpiote: gpiote@40006000 { compatible = "nordic,nrf-gpiote"; reg = <0x40006000 0x1000>; interrupts = <6 5>; status = "disabled"; label = "GPIOTE_0"; }; gpio0: gpio@50000000 { compatible = "nordic,nrf-gpio"; gpio-controller; /* This way of addressing is used to be compatible */ /* with nrf52840.dtsi */ reg = <0x50000000 0x200 0x50000500 0x300>; #gpio-cells = <2>; label = "GPIO_0"; status = "disabled"; }; i2c0: i2c@40003000 { /* * This i2c node can be TWI, TWIM, or TWIS, * for the user to pick: * compatible = "nordic,nrf-twi" or * "nordic,nrf-twim" or * "nordic,nrf-twis". */ #address-cells = <1>; #size-cells = <0>; reg = <0x40003000 0x1000>; clock-frequency = <I2C_BITRATE_STANDARD>; interrupts = <3 1>; status = "disabled"; label = "I2C_0"; }; pwm0: pwm@4001c000 { compatible = "nordic,nrf-pwm"; reg = <0x4001c000 0x1000>; interrupts = <28 1>; status = "disabled"; label = "PWM_0"; #pwm-cells = <1>; }; qdec: qdec@40012000 { compatible = "nordic,nrf-qdec"; reg = <0x40012000 0x1000>; interrupts = <18 1>; status = "disabled"; label = "QDEC"; }; rng: random@4000d000 { compatible = "nordic,nrf-rng"; reg = <0x4000d000 0x1000>; interrupts = <13 1>; status = "okay"; label = "RNG"; }; spi0: spi@40004000 { /* * This spi node can be SPI, SPIM, or SPIS, * for the user to pick: * compatible = "nordic,nrf-spi" or * "nordic,nrf-spim" or * "nordic,nrf-spis". */ #address-cells = <1>; #size-cells = <0>; reg = <0x40004000 0x1000>; interrupts = <4 1>; status = "disabled"; label = "SPI_0"; }; spi1: spi@40003000 { /* cannot be used with i2c0 */ /* * This spi node can be SPI, SPIM, or SPIS, * for the user to pick: * compatible = "nordic,nrf-spi" or * "nordic,nrf-spim" or * "nordic,nrf-spis". */ #address-cells = <1>; #size-cells = <0>; reg = <0x40003000 0x1000>; interrupts = <3 1>; status = "disabled"; label = "SPI_1"; }; rtc0: rtc@4000b000 { compatible = "nordic,nrf-rtc"; reg = <0x4000b000 0x1000>; interrupts = <11 1>; status = "okay"; clock-frequency = <32768>; prescaler = <1>; label = "RTC_0"; }; rtc1: rtc@40011000 { compatible = "nordic,nrf-rtc"; reg = <0x40011000 0x1000>; interrupts = <17 1>; status = "okay"; clock-frequency = <32768>; prescaler = <1>; label = "RTC_1"; }; timer0: timer@40008000 { compatible = "nordic,nrf-timer"; status = "okay"; reg = <0x40008000 0x1000>; interrupts = <8 1>; prescaler = <0>; label = "TIMER_0"; }; timer1: timer@40009000 { compatible = "nordic,nrf-timer"; status = "okay"; reg = <0x40009000 0x1000>; interrupts = <9 1>; prescaler = <0>; label = "TIMER_1"; }; timer2: timer@4000a000 { compatible = "nordic,nrf-timer"; status = "okay"; reg = <0x4000a000 0x1000>; interrupts = <10 1>; prescaler = <0>; label = "TIMER_2"; }; temp: temp@4000c000 { compatible = "nordic,nrf-temp"; reg = <0x4000c000 0x1000>; interrupts = <12 1>; status = "okay"; label = "TEMP_0"; }; wdt: wdt0: watchdog@40010000 { compatible = "nordic,nrf-watchdog"; reg = <0x40010000 0x1000>; interrupts = <16 1>; status = "okay"; label = "WDT"; }; }; }; &nvic { arm,num-irq-priority-bits = <3>; }; &sw_pwm { timer-instance = <2>; channel-count = <3>; clock-prescaler = <0>; ppi-base = <14>; gpiote-base = <0>; #pwm-cells = <1>; }; |