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Elixir Cross Referencer

# interrupt controller configuration options

# Copyright (c) 2015 Intel Corporation
# SPDX-License-Identifier: Apache-2.0

menu "Interrupt Controllers"

config ARCV2_INTERRUPT_UNIT
	bool "ARCv2 Interrupt Unit"
	default y
	depends on ARC
	help
	  The ARCv2 interrupt unit has 16 allocated exceptions associated with
	  vectors 0 to 15 and 240 interrupts associated with vectors 16 to 255.
	  The interrupt unit is optional in the ARCv2-based processors. When
	  building a processor, you can configure the processor to include an
	  interrupt unit. The ARCv2 interrupt unit is highly programmable.

config PLIC
	bool "Platform Level Interrupt Controller (PLIC)"
	default y
	depends on SOC_FAMILY_RISCV_PRIVILEGE
	select RISCV_HAS_PLIC
	select MULTI_LEVEL_INTERRUPTS
	select 2ND_LEVEL_INTERRUPTS
	help
	  Platform Level Interrupt Controller provides support
	  for external interrupt lines defined by the RISC-V SoC;

config SWERV_PIC
	bool "SweRV EH1 Programmable Interrupt Controller (PIC)"
	default n
	help
	  Programmable Interrupt Controller for the SweRV EH1 RISC-V CPU;

config VEXRISCV_LITEX_IRQ
	bool "VexRiscv LiteX Interrupt controller"
	depends on SOC_RISCV32_LITEX_VEXRISCV
	help
	  IRQ implementation for LiteX VexRiscv

source "drivers/interrupt_controller/Kconfig.multilevel"

source "drivers/interrupt_controller/Kconfig.loapic"

source "drivers/interrupt_controller/Kconfig.dw"

source "drivers/interrupt_controller/Kconfig.stm32"

source "drivers/interrupt_controller/Kconfig.cavs"

source "drivers/interrupt_controller/Kconfig.rv32m1"

source "drivers/interrupt_controller/Kconfig.sam0"

source "drivers/interrupt_controller/Kconfig.gic"

endmenu