Loading...
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 | /*
* Copyright (c) 2017 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <sys/util.h>
#include <kernel.h>
#include <logging/log.h>
#define START_TRIG_INT1 0
#define START_TRIG_INT2 1
#define TRIGGED_INT1 4
#define TRIGGED_INT2 5
LOG_MODULE_DECLARE(lis2dh, CONFIG_SENSOR_LOG_LEVEL);
#include "lis2dh.h"
static inline void setup_int1(struct device *dev,
bool enable)
{
struct lis2dh_data *lis2dh = dev->driver_data;
gpio_pin_interrupt_configure(lis2dh->gpio_int1,
DT_LIS2DH_INT1_GPIOS_PIN,
enable
? GPIO_INT_EDGE_TO_ACTIVE
: GPIO_INT_DISABLE);
}
static int lis2dh_trigger_drdy_set(struct device *dev, enum sensor_channel chan,
sensor_trigger_handler_t handler)
{
struct lis2dh_data *lis2dh = dev->driver_data;
int status;
setup_int1(dev, false);
/* cancel potentially pending trigger */
atomic_clear_bit(&lis2dh->trig_flags, TRIGGED_INT1);
status = lis2dh_reg_field_update(dev, LIS2DH_REG_CTRL3,
LIS2DH_EN_DRDY1_INT1_SHIFT,
LIS2DH_EN_DRDY1_INT1, 0);
lis2dh->handler_drdy = handler;
if ((handler == NULL) || (status < 0)) {
return status;
}
lis2dh->chan_drdy = chan;
/* serialize start of int1 in thread to synchronize output sampling
* and first interrupt. this avoids concurrent bus context access.
*/
atomic_set_bit(&lis2dh->trig_flags, START_TRIG_INT1);
#if defined(CONFIG_LIS2DH_TRIGGER_OWN_THREAD)
k_sem_give(&lis2dh->gpio_sem);
#elif defined(CONFIG_LIS2DH_TRIGGER_GLOBAL_THREAD)
k_work_submit(&lis2dh->work);
#endif
return 0;
}
static int lis2dh_start_trigger_int1(struct device *dev)
{
int status;
u8_t raw[LIS2DH_BUF_SZ];
u8_t ctrl1 = 0U;
/* power down temporarily to align interrupt & data output sampling */
status = lis2dh_reg_read_byte(dev, LIS2DH_REG_CTRL1, &ctrl1);
if (unlikely(status < 0)) {
return status;
}
status = lis2dh_reg_write_byte(dev, LIS2DH_REG_CTRL1,
ctrl1 & ~LIS2DH_ODR_MASK);
if (unlikely(status < 0)) {
return status;
}
LOG_DBG("ctrl1=0x%x @tick=%u", ctrl1, k_cycle_get_32());
/* empty output data */
status = lis2dh_burst_read(dev, LIS2DH_REG_STATUS, raw, sizeof(raw));
if (unlikely(status < 0)) {
return status;
}
setup_int1(dev, true);
/* re-enable output sampling */
status = lis2dh_reg_write_byte(dev, LIS2DH_REG_CTRL1, ctrl1);
if (unlikely(status < 0)) {
return status;
}
return lis2dh_reg_field_update(dev, LIS2DH_REG_CTRL3,
LIS2DH_EN_DRDY1_INT1_SHIFT,
LIS2DH_EN_DRDY1_INT1, 1);
}
#if defined(DT_INST_0_ST_LIS2DH_IRQ_GPIOS_CONTROLLER_1)
#define LIS2DH_ANYM_CFG (LIS2DH_INT_CFG_ZHIE_ZUPE | LIS2DH_INT_CFG_YHIE_YUPE |\
LIS2DH_INT_CFG_XHIE_XUPE)
static inline void setup_int2(struct device *dev,
bool enable)
{
struct lis2dh_data *lis2dh = dev->driver_data;
gpio_pin_interrupt_configure(lis2dh->gpio_int2,
DT_LIS2DH_INT2_GPIOS_PIN,
enable
? GPIO_INT_EDGE_TO_ACTIVE
: GPIO_INT_DISABLE);
}
static int lis2dh_trigger_anym_set(struct device *dev,
sensor_trigger_handler_t handler)
{
struct lis2dh_data *lis2dh = dev->driver_data;
int status;
u8_t reg_val;
setup_int2(dev, false);
/* cancel potentially pending trigger */
atomic_clear_bit(&lis2dh->trig_flags, TRIGGED_INT2);
/* disable all interrupt 2 events */
status = lis2dh_reg_write_byte(dev, LIS2DH_REG_INT2_CFG, 0);
/* make sure any pending interrupt is cleared */
status = lis2dh_reg_read_byte(dev, LIS2DH_REG_INT2_SRC, ®_val);
lis2dh->handler_anymotion = handler;
if ((handler == NULL) || (status < 0)) {
return status;
}
/* serialize start of int2 in thread to synchronize output sampling
* and first interrupt. this avoids concurrent bus context access.
*/
atomic_set_bit(&lis2dh->trig_flags, START_TRIG_INT2);
#if defined(CONFIG_LIS2DH_TRIGGER_OWN_THREAD)
k_sem_give(&lis2dh->gpio_sem);
#elif defined(CONFIG_LIS2DH_TRIGGER_GLOBAL_THREAD)
k_work_submit(&lis2dh->work);
#endif
return 0;
}
static int lis2dh_start_trigger_int2(struct device *dev)
{
struct lis2dh_data *lis2dh = dev->driver_data;
setup_int2(dev, true);
return lis2dh_reg_write_byte(dev, LIS2DH_REG_INT2_CFG,
LIS2DH_ANYM_CFG);
}
#endif /* DT_INST_0_ST_LIS2DH_IRQ_GPIOS_CONTROLLER_1 */
int lis2dh_trigger_set(struct device *dev,
const struct sensor_trigger *trig,
sensor_trigger_handler_t handler)
{
if (trig->type == SENSOR_TRIG_DATA_READY &&
trig->chan == SENSOR_CHAN_ACCEL_XYZ) {
return lis2dh_trigger_drdy_set(dev, trig->chan, handler);
#if defined(DT_INST_0_ST_LIS2DH_IRQ_GPIOS_CONTROLLER_1)
} else if (trig->type == SENSOR_TRIG_DELTA) {
return lis2dh_trigger_anym_set(dev, handler);
#endif /* DT_INST_0_ST_LIS2DH_IRQ_GPIOS_CONTROLLER_1 */
}
return -ENOTSUP;
}
int lis2dh_acc_slope_config(struct device *dev, enum sensor_attribute attr,
const struct sensor_value *val)
{
int status;
if (attr == SENSOR_ATTR_SLOPE_TH) {
u8_t range_g, reg_val;
u32_t slope_th_ums2;
status = lis2dh_reg_read_byte(dev, LIS2DH_REG_CTRL4, ®_val);
if (status < 0) {
return status;
}
/* fs reg value is in the range 0 (2g) - 3 (16g) */
range_g = 2 * (1 << ((LIS2DH_FS_MASK & reg_val)
>> LIS2DH_FS_SHIFT));
slope_th_ums2 = val->val1 * 1000000 + val->val2;
/* make sure the provided threshold does not exceed range */
if ((slope_th_ums2 - 1) > (range_g * SENSOR_G)) {
return -EINVAL;
}
/* 7 bit full range value */
reg_val = 128 / range_g * (slope_th_ums2 - 1) / SENSOR_G;
LOG_INF("int2_ths=0x%x range_g=%d ums2=%u", reg_val,
range_g, slope_th_ums2 - 1);
status = lis2dh_reg_write_byte(dev, LIS2DH_REG_INT2_THS,
reg_val);
} else { /* SENSOR_ATTR_SLOPE_DUR */
/*
* slope duration is measured in number of samples:
* N/ODR where N is the register value
*/
if (val->val1 < 0 || val->val1 > 127) {
return -ENOTSUP;
}
LOG_INF("int2_dur=0x%x", val->val1);
status = lis2dh_reg_write_byte(dev, LIS2DH_REG_INT2_DUR,
val->val1);
}
return status;
}
static void lis2dh_gpio_int1_callback(struct device *dev,
struct gpio_callback *cb, u32_t pins)
{
struct lis2dh_data *lis2dh =
CONTAINER_OF(cb, struct lis2dh_data, gpio_int1_cb);
ARG_UNUSED(pins);
atomic_set_bit(&lis2dh->trig_flags, TRIGGED_INT1);
#if defined(CONFIG_LIS2DH_TRIGGER_OWN_THREAD)
k_sem_give(&lis2dh->gpio_sem);
#elif defined(CONFIG_LIS2DH_TRIGGER_GLOBAL_THREAD)
k_work_submit(&lis2dh->work);
#endif
}
#if defined(DT_INST_0_ST_LIS2DH_IRQ_GPIOS_CONTROLLER_1)
static void lis2dh_gpio_int2_callback(struct device *dev,
struct gpio_callback *cb, u32_t pins)
{
struct lis2dh_data *lis2dh =
CONTAINER_OF(cb, struct lis2dh_data, gpio_int2_cb);
ARG_UNUSED(pins);
atomic_set_bit(&lis2dh->trig_flags, TRIGGED_INT2);
#if defined(CONFIG_LIS2DH_TRIGGER_OWN_THREAD)
k_sem_give(&lis2dh->gpio_sem);
#elif defined(CONFIG_LIS2DH_TRIGGER_GLOBAL_THREAD)
k_work_submit(&lis2dh->work);
#endif
}
#endif /* DT_INST_0_ST_LIS2DH_IRQ_GPIOS_CONTROLLER_1 */
static void lis2dh_thread_cb(void *arg)
{
struct device *dev = arg;
struct lis2dh_data *lis2dh = dev->driver_data;
int status;
if (unlikely(atomic_test_and_clear_bit(&lis2dh->trig_flags,
START_TRIG_INT1))) {
status = lis2dh_start_trigger_int1(dev);
if (unlikely(status < 0)) {
LOG_ERR("lis2dh_start_trigger_int1: %d", status);
}
return;
}
#if defined(DT_INST_0_ST_LIS2DH_IRQ_GPIOS_CONTROLLER_1)
if (unlikely(atomic_test_and_clear_bit(&lis2dh->trig_flags,
START_TRIG_INT2))) {
status = lis2dh_start_trigger_int2(dev);
if (unlikely(status < 0)) {
LOG_ERR("lis2dh_start_trigger_int2: %d", status);
}
return;
}
#endif /* DT_INST_0_ST_LIS2DH_IRQ_GPIOS_CONTROLLER_1 */
if (atomic_test_and_clear_bit(&lis2dh->trig_flags,
TRIGGED_INT1)) {
struct sensor_trigger drdy_trigger = {
.type = SENSOR_TRIG_DATA_READY,
.chan = lis2dh->chan_drdy,
};
if (likely(lis2dh->handler_drdy != NULL)) {
lis2dh->handler_drdy(dev, &drdy_trigger);
}
return;
}
#if defined(DT_INST_0_ST_LIS2DH_IRQ_GPIOS_CONTROLLER_1)
if (atomic_test_and_clear_bit(&lis2dh->trig_flags,
TRIGGED_INT2)) {
struct sensor_trigger anym_trigger = {
.type = SENSOR_TRIG_DELTA,
.chan = lis2dh->chan_drdy,
};
u8_t reg_val;
/* clear interrupt 2 to de-assert int2 line */
status = lis2dh_reg_read_byte(dev, LIS2DH_REG_INT2_SRC,
®_val);
if (status < 0) {
LOG_ERR("clearing interrupt 2 failed: %d", status);
return;
}
if (likely(lis2dh->handler_anymotion != NULL)) {
lis2dh->handler_anymotion(dev, &anym_trigger);
}
LOG_DBG("@tick=%u int2_src=0x%x", k_cycle_get_32(),
reg_val);
return;
}
#endif /* DT_INST_0_ST_LIS2DH_IRQ_GPIOS_CONTROLLER_1 */
}
#ifdef CONFIG_LIS2DH_TRIGGER_OWN_THREAD
static void lis2dh_thread(void *arg1, void *unused2, void *unused3)
{
struct device *dev = arg1;
struct lis2dh_data *lis2dh = dev->driver_data;
ARG_UNUSED(unused2);
ARG_UNUSED(unused3);
while (1) {
k_sem_take(&lis2dh->gpio_sem, K_FOREVER);
lis2dh_thread_cb(dev);
}
}
#endif
#ifdef CONFIG_LIS2DH_TRIGGER_GLOBAL_THREAD
static void lis2dh_work_cb(struct k_work *work)
{
struct lis2dh_data *lis2dh =
CONTAINER_OF(work, struct lis2dh_data, work);
lis2dh_thread_cb(lis2dh->dev);
}
#endif
int lis2dh_init_interrupt(struct device *dev)
{
struct lis2dh_data *lis2dh = dev->driver_data;
int status;
u8_t raw[2];
/* setup data ready gpio interrupt */
lis2dh->gpio_int1 = device_get_binding(DT_LIS2DH_INT1_GPIO_DEV_NAME);
if (lis2dh->gpio_int1 == NULL) {
LOG_ERR("Cannot get pointer to %s device",
DT_LIS2DH_INT1_GPIO_DEV_NAME);
return -EINVAL;
}
/* data ready int1 gpio configuration */
status = gpio_pin_configure(lis2dh->gpio_int1, DT_LIS2DH_INT1_GPIOS_PIN,
GPIO_INPUT | DT_LIS2DH_INT1_GPIOS_FLAGS);
if (status < 0) {
LOG_ERR("Could not configure gpio %d",
DT_LIS2DH_INT1_GPIOS_PIN);
return status;
}
gpio_init_callback(&lis2dh->gpio_int1_cb,
lis2dh_gpio_int1_callback,
BIT(DT_LIS2DH_INT1_GPIOS_PIN));
status = gpio_add_callback(lis2dh->gpio_int1, &lis2dh->gpio_int1_cb);
if (status < 0) {
LOG_ERR("Could not add gpio int1 callback");
return status;
}
LOG_INF("int1 on pin=%d", DT_LIS2DH_INT1_GPIOS_PIN);
#if defined(DT_INST_0_ST_LIS2DH_IRQ_GPIOS_CONTROLLER_1)
/* setup any motion gpio interrupt */
lis2dh->gpio_int2 = device_get_binding(DT_LIS2DH_INT2_GPIO_DEV_NAME);
if (lis2dh->gpio_int2 == NULL) {
LOG_ERR("Cannot get pointer to %s device",
DT_LIS2DH_INT2_GPIO_DEV_NAME);
return -EINVAL;
}
/* any motion int2 gpio configuration */
status = gpio_pin_configure(lis2dh->gpio_int2, DT_LIS2DH_INT2_GPIOS_PIN,
GPIO_INPUT | DT_LIS2DH_INT2_GPIOS_FLAGS);
if (status < 0) {
LOG_ERR("Could not configure gpio %d",
DT_LIS2DH_INT2_GPIOS_PIN);
return status;
}
gpio_init_callback(&lis2dh->gpio_int2_cb,
lis2dh_gpio_int2_callback,
BIT(DT_LIS2DH_INT2_GPIOS_PIN));
/* callback is going to be enabled by trigger setting function */
status = gpio_add_callback(lis2dh->gpio_int2, &lis2dh->gpio_int2_cb);
if (status < 0) {
LOG_ERR("Could not add gpio int2 callback (%d)", status);
return status;
}
LOG_INF("int2 on pin=%d", DT_LIS2DH_INT2_GPIOS_PIN);
#endif /* DT_INST_0_ST_LIS2DH_IRQ_GPIOS_CONTROLLER_1 */
#if defined(CONFIG_LIS2DH_TRIGGER_OWN_THREAD)
k_sem_init(&lis2dh->gpio_sem, 0, UINT_MAX);
k_thread_create(&lis2dh->thread, lis2dh->thread_stack,
CONFIG_LIS2DH_THREAD_STACK_SIZE,
(k_thread_entry_t)lis2dh_thread, dev, NULL, NULL,
K_PRIO_COOP(CONFIG_LIS2DH_THREAD_PRIORITY), 0, K_NO_WAIT);
#elif defined(CONFIG_LIS2DH_TRIGGER_GLOBAL_THREAD)
lis2dh->work.handler = lis2dh_work_cb;
lis2dh->dev = dev;
#endif
/* disable interrupt 2 in case of warm (re)boot */
status = lis2dh_reg_write_byte(dev, LIS2DH_REG_INT2_CFG, 0);
if (status < 0) {
LOG_ERR("Interrupt 2 disable reg write failed (%d)",
status);
return status;
}
(void)memset(raw, 0, sizeof(raw));
status = lis2dh_burst_write(dev, LIS2DH_REG_INT2_THS, raw, sizeof(raw));
if (status < 0) {
LOG_ERR("Burst write to INT2 THS failed (%d)", status);
return status;
}
/* latch int2 line interrupt */
status = lis2dh_reg_write_byte(dev, LIS2DH_REG_CTRL5,
LIS2DH_EN_LIR_INT2);
if (status < 0) {
LOG_ERR("INT2 latch enable reg write failed (%d)", status);
return status;
}
/* enable interrupt 2 on int2 line */
return lis2dh_reg_write_byte(dev, LIS2DH_REG_CTRL6,
LIS2DH_EN_INT2_INT2);
}
|