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* Copyright (c) 2019 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
/ {
model = "Nordic NRF5340 Dev Kit";
compatible = "nordic,nrf5340-dk", "nordic,nrf5340-cpuapp-qkaa",
"nordic,nrf5340-cpuapp";
chosen {
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,uart-mcumgr = &uart0;
};
leds {
compatible = "gpio-leds";
led0: led_0 {
gpios = <&gpio0 28 GPIO_INT_ACTIVE_LOW>;
label = "Green LED 0";
};
led1: led_1 {
gpios = <&gpio0 29 GPIO_INT_ACTIVE_LOW>;
label = "Green LED 1";
};
led2: led_2 {
gpios = <&gpio0 30 GPIO_INT_ACTIVE_LOW>;
label = "Green LED 2";
};
led3: led_3 {
gpios = <&gpio0 31 GPIO_INT_ACTIVE_LOW>;
label = "Green LED 3";
};
};
buttons {
compatible = "gpio-keys";
button0: button_0 {
gpios = <&gpio0 23 GPIO_PUD_PULL_UP>;
label = "Push button 1";
};
button1: button_1 {
gpios = <&gpio0 24 GPIO_PUD_PULL_UP>;
label = "Push button 2";
};
button2: button_2 {
gpios = <&gpio0 8 GPIO_PUD_PULL_UP>;
label = "Push button 3";
};
button3: button_3 {
gpios = <&gpio0 9 GPIO_PUD_PULL_UP>;
label = "Push button 4";
};
};
/* These aliases are provided for compatibility with samples */
aliases {
led0 = &led0;
led1 = &led1;
led2 = &led2;
led3 = &led3;
sw0 = &button0;
sw1 = &button1;
sw2 = &button2;
sw3 = &button3;
};
};
&adc {
status = "okay";
};
&gpiote {
status = "okay";
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&i2c1 {
compatible = "nordic,nrf-twim";
status = "okay";
sda-pin = <30>;
scl-pin = <31>;
};
&uart0 {
status = "okay";
current-speed = <115200>;
tx-pin = <20>;
rx-pin = <22>;
rts-pin = <19>;
cts-pin = <21>;
};
&pwm0 {
status = "okay";
ch0-pin = <28>;
};
&spi2 {
status = "okay";
sck-pin = <32>;
mosi-pin = <32>;
miso-pin = <36>;
};
&timer0 {
status = "okay";
};
&timer1 {
status = "okay";
};
&timer2 {
status = "okay";
};
&flash0 {
/*
* For more information, see:
* http://docs.zephyrproject.org/latest/guides/dts/index.html#flash-partitions
*/
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0x10000>;
};
slot0_partition: partition@10000 {
label = "image-0";
};
slot0_ns_partition: partition@40000 {
label = "image-0-nonsecure";
};
slot1_partition: partition@80000 {
label = "image-1";
};
slot1_ns_partition: partition@b0000 {
label = "image-1-nonsecure";
};
scratch_partition: partition@f0000 {
label = "image-scratch";
reg = <0x000f0000 0xa000>;
};
storage_partition: partition@fa000 {
label = "storage";
reg = <0x000fa000 0x00006000>;
};
};
};
/ {
/* SRAM allocated to the Non-Secure image */
sram0_ns: memory@20020000 {
device_type = "memory";
compatible = "mmio-sram";
};
};
/* Include partition configuration file */
#include "nrf5340_dk_nrf5340_cpuapp_partition_conf.dts"
/* Include shared RAM configuration file */
#include "nrf5340_dk_nrf5340_shared_sram_planning_conf.dts"
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