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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 | # i.MX RT series # Copyright (c) 2017, NXP # SPDX-License-Identifier: Apache-2.0 if SOC_SERIES_IMX_RT config SOC_SERIES default "rt" config TEXT_SECTION_OFFSET default 0x2000 if BOOT_FLEXSPI_NOR || BOOT_SEMC_NOR if CLOCK_CONTROL config CLOCK_CONTROL_MCUX_CCM default y if HAS_MCUX_CCM endif # CLOCK_CONTROL if DISK_ACCESS_SDHC config DISK_ACCESS_USDHC default y if (HAS_MCUX_USDHC1 || HAS_MCUX_USDHC2) endif # DISK_ACCESS_SDHC if DISPLAY config DISPLAY_MCUX_ELCDIF default y if HAS_MCUX_ELCDIF endif # DISPLAY if GPIO config GPIO_MCUX_IGPIO default y if HAS_MCUX_IGPIO endif # GPIO if ENTROPY_GENERATOR config ENTROPY_MCUX_TRNG default y if HAS_MCUX_TRNG endif # ENTROPY_GENERATOR if I2C config I2C_MCUX_LPI2C default y if HAS_MCUX_LPI2C endif # I2C if PWM config PWM_MCUX default y if HAS_MCUX_PWM endif # PWM if NET_L2_ETHERNET config ETH_MCUX default y if HAS_MCUX_ENET endif # NET_L2_ETHERNET if SERIAL config UART_MCUX_LPUART default y if HAS_MCUX_LPUART endif # SERIAL if COUNTER config COUNTER_MCUX_GPT default y if HAS_MCUX_GPT config COUNTER_MCUX_GPT1 default y if HAS_MCUX_GPT config COUNTER_MCUX_GPT2 default y if HAS_MCUX_GPT endif # COUNTER if SPI config SPI_MCUX_LPSPI default y if HAS_MCUX_LPSPI endif # SPI if CODE_ITCM config FLASH_SIZE default $(dt_node_reg_size_int,/soc/flexram@400b0000/itcm@0,0,K) config FLASH_BASE_ADDRESS default $(dt_node_reg_addr_hex,/soc/flexram@400b0000/itcm@0) endif # CODE_ITCM if CODE_FLEXSPI config FLASH_SIZE default $(dt_node_reg_size_int,/soc/spi@402a8000,1,K) config FLASH_BASE_ADDRESS default $(dt_node_reg_addr_hex,/soc/spi@402a8000,1) endif # CODE_FLEXSPI if CODE_FLEXSPI2 config FLASH_SIZE default $(dt_node_reg_size_int,/soc/spi@402a4000,1,K) config FLASH_BASE_ADDRESS default $(dt_node_reg_addr_hex,/soc/spi@402a4000,1) endif # CODE_FLEXSPI2 if DATA_DTCM config SRAM_SIZE default $(dt_node_reg_size_int,/soc/flexram@400b0000/dtcm@20000000,0,K) config SRAM_BASE_ADDRESS default $(dt_node_reg_addr_hex,/soc/flexram@400b0000/dtcm@20000000) endif # DATA_DTCM if DATA_SEMC config SRAM_SIZE default $(dt_node_reg_size_int,/memory@80000000,0,K) config SRAM_BASE_ADDRESS default $(dt_node_reg_addr_hex,/memory@80000000) endif # DATA_SEMC if DATA_OCRAM config SRAM_SIZE default $(dt_node_reg_size_int,/memory@20200000,0,K) config SRAM_BASE_ADDRESS default $(dt_node_reg_addr_hex,/memory@20200000) endif # DATA_OCRAM if USB config USB_DC_NXP_EHCI default y endif # USB if VIDEO config VIDEO_MCUX_CSI default y if HAS_MCUX_CSI endif source "soc/arm/nxp_imx/rt/Kconfig.defconfig.mimxrt*" endif # SOC_SERIES_IMX_RT |