Linux Audio

Check our new training course

Embedded Linux Audio

Check our new training course
with Creative Commons CC-BY-SA
lecture materials

Bootlin logo

Elixir Cross Referencer

Loading...
  1
  2
  3
  4
  5
  6
  7
  8
  9
 10
 11
 12
 13
 14
 15
 16
 17
 18
 19
 20
 21
 22
 23
 24
 25
 26
 27
 28
 29
 30
 31
 32
 33
 34
 35
 36
 37
 38
 39
 40
 41
 42
 43
 44
 45
 46
 47
 48
 49
 50
 51
 52
 53
 54
 55
 56
 57
 58
 59
 60
 61
 62
 63
 64
 65
 66
 67
 68
 69
 70
 71
 72
 73
 74
 75
 76
 77
 78
 79
 80
 81
 82
 83
 84
 85
 86
 87
 88
 89
 90
 91
 92
 93
 94
 95
 96
 97
 98
 99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
/*
 * Copyright (c) 2016 Intel Corporation.
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <errno.h>

#include <stdio.h>
#include <kernel.h>
#include <board.h>
#include <device.h>
#include <init.h>
#include <dma.h>

#include "qm_dma.h"
#include "qm_isr.h"
#include "clk.h"

#define CYCLE_NOP \
	 __asm__ __volatile__ ("nop"); \
	 __asm__ __volatile__ ("nop"); \
	 __asm__ __volatile__ ("nop"); \
	 __asm__ __volatile__ ("nop")


struct dma_qmsi_config_info {
	qm_dma_t instance; /* Controller instance. */
};

struct dma_qmsi_context {
	u32_t index;
	struct device *dev;
};

struct dma_qmsi_driver_data {
	void (*transfer[QM_DMA_CHANNEL_NUM])(struct device *dev, void *data);
	void (*error[QM_DMA_CHANNEL_NUM])(struct device *dev, void *data);
	void *callback_data[QM_DMA_CHANNEL_NUM];
#ifdef CONFIG_DEVICE_POWER_MANAGEMENT
	u32_t device_power_state;
	qm_dma_context_t saved_ctx;
#endif
	void (*dma_user_callback[QM_DMA_CHANNEL_NUM])(struct device *dev,
						      u32_t channel_id,
						      int error_code);
};


static struct dma_qmsi_context dma_context[QM_DMA_CHANNEL_NUM];
static void dma_qmsi_config(struct device *dev);

static void dma_callback(void *callback_context, u32_t len,
						 int error_code)
{
	struct dma_qmsi_driver_data *data;
	u32_t channel;
	struct dma_qmsi_context *context = callback_context;

	channel = context->index;
	data = context->dev->driver_data;
	if (error_code != 0) {
		data->error[channel](context->dev,
				     data->callback_data[channel]);
		return;
	}

	data->transfer[channel](context->dev, data->callback_data[channel]);
}

static void dma_drv_callback(void *callback_context, u32_t len,
			     int error_code)
{
	struct dma_qmsi_context *context = callback_context;
	struct dma_qmsi_driver_data *data;
	u32_t channel;

	channel = context->index;
	data = context->dev->driver_data;

	data->dma_user_callback[channel](context->dev, channel, error_code);
}

static int dma_qmsi_channel_config(struct device *dev, u32_t channel,
				   struct dma_channel_config *config)
{
	qm_dma_channel_config_t qmsi_cfg;
	const struct dma_qmsi_config_info *info = dev->config->config_info;
	struct dma_qmsi_driver_data *data = dev->driver_data;

	qmsi_cfg.handshake_interface = (qm_dma_handshake_interface_t)
					config->handshake_interface;
	qmsi_cfg.handshake_polarity = (qm_dma_handshake_polarity_t)
				       config->handshake_polarity;
	qmsi_cfg.source_transfer_width = (qm_dma_transfer_width_t)
					  config->source_transfer_width;
	qmsi_cfg.channel_direction = (qm_dma_channel_direction_t)
				      config->channel_direction;
	qmsi_cfg.destination_burst_length = (qm_dma_burst_length_t)
					     config->destination_burst_length;
	qmsi_cfg.destination_transfer_width = (qm_dma_transfer_width_t)
					    config->destination_transfer_width;
	qmsi_cfg.source_burst_length = (qm_dma_burst_length_t)
					config->source_burst_length;

	/* TODO: add support for using other DMA transfer types. */
	qmsi_cfg.transfer_type = QM_DMA_TYPE_SINGLE;

	data->callback_data[channel] = config->callback_data;
	data->transfer[channel] = config->dma_transfer;
	data->error[channel] = config->dma_error;

	dma_context[channel].index = channel;
	dma_context[channel].dev = dev;

	qmsi_cfg.callback_context = &dma_context[channel];
	qmsi_cfg.client_callback = dma_callback;

	return qm_dma_channel_set_config(info->instance, channel, &qmsi_cfg);
}

static int dma_qmsi_transfer_config(struct device *dev, u32_t channel,
				    struct dma_transfer_config *config)
{
	const struct dma_qmsi_config_info *info = dev->config->config_info;

	return qm_dma_transfer_set_config(info->instance, channel,
					 (qm_dma_transfer_t *)config);
}

static int width_index(u32_t num_bytes, u32_t *index)
{
	switch (num_bytes) {
	case 1:
		*index = QM_DMA_TRANS_WIDTH_8;
		break;
	case 2:
		*index = QM_DMA_TRANS_WIDTH_16;
		break;
	case 4:
		*index = QM_DMA_TRANS_WIDTH_32;
		break;
	case 8:
		*index = QM_DMA_TRANS_WIDTH_64;
		break;
	case 16:
		*index = QM_DMA_TRANS_WIDTH_128;
		break;
	case 32:
		*index = QM_DMA_TRANS_WIDTH_256;
		break;
	default:
		return -ENOTSUP;
	}

	return 0;
}

static int bst_index(u32_t num_units, u32_t *index)
{
	switch (num_units) {
	case 1:
		*index = QM_DMA_BURST_TRANS_LENGTH_1;
		break;
	case 4:
		*index = QM_DMA_BURST_TRANS_LENGTH_4;
		break;
	case 8:
		*index = QM_DMA_BURST_TRANS_LENGTH_8;
		break;
	case 16:
		*index = QM_DMA_BURST_TRANS_LENGTH_16;
		break;
	case 32:
		*index = QM_DMA_BURST_TRANS_LENGTH_32;
		break;
	case 64:
		*index = QM_DMA_BURST_TRANS_LENGTH_64;
		break;
	case 128:
		*index = QM_DMA_BURST_TRANS_LENGTH_128;
		break;
	case 256:
		*index = QM_DMA_BURST_TRANS_LENGTH_256;
		break;
	default:
		return -ENOTSUP;
	}

	return 0;
}

static int dma_qmsi_chan_config(struct device *dev, u32_t channel,
				struct dma_config *config)
{
	const struct dma_qmsi_config_info *info = dev->config->config_info;
	struct dma_qmsi_driver_data *data = dev->driver_data;
	qm_dma_transfer_t qmsi_transfer_cfg = { 0 };
	qm_dma_channel_config_t qmsi_cfg = { 0 };
	u32_t temp = 0;
	int ret = 0;

	if (config->block_count != 1) {
		return -ENOTSUP;
	}

	qmsi_cfg.handshake_interface = (qm_dma_handshake_interface_t)
					config->dma_slot;
	qmsi_cfg.channel_direction = (qm_dma_channel_direction_t)
				      config->channel_direction;

	ret = width_index(config->source_data_size, &temp);
	if (ret != 0) {
		return ret;
	}
	qmsi_cfg.source_transfer_width = (qm_dma_transfer_width_t) temp;

	ret = width_index(config->dest_data_size, &temp);
	if (ret != 0) {
		return ret;
	}
	qmsi_cfg.destination_transfer_width = (qm_dma_transfer_width_t) temp;

	ret = bst_index(config->dest_burst_length, &temp);
	if (ret != 0) {
		return ret;
	}
	qmsi_cfg.destination_burst_length = (qm_dma_burst_length_t) temp;

	ret = bst_index(config->source_burst_length, &temp);
	if (ret != 0) {
		return ret;
	}
	qmsi_cfg.source_burst_length = (qm_dma_burst_length_t) temp;

	/* TODO: add support for using other DMA transfer types. */
	qmsi_cfg.transfer_type = QM_DMA_TYPE_SINGLE;

	data->dma_user_callback[channel] = config->dma_callback;

	dma_context[channel].index = channel;
	dma_context[channel].dev = dev;

	qmsi_cfg.callback_context = &dma_context[channel];
	qmsi_cfg.client_callback = dma_drv_callback;

	ret = qm_dma_channel_set_config(info->instance, channel, &qmsi_cfg);
	if (ret != 0) {
		return ret;
	}

	qmsi_transfer_cfg.block_size = config->head_block->block_size;
	qmsi_transfer_cfg.source_address = (u32_t *)
					   config->head_block->source_address;
	qmsi_transfer_cfg.destination_address = (u32_t *)
					      config->head_block->dest_address;

	return qm_dma_transfer_set_config(info->instance, channel,
					  &qmsi_transfer_cfg);
}

static int dma_qmsi_transfer_start(struct device *dev, u32_t channel)
{
	int ret;
	const struct dma_qmsi_config_info *info = dev->config->config_info;

	ret = qm_dma_transfer_start(info->instance, channel);

	CYCLE_NOP;

	return ret;
}

static int dma_qmsi_start(struct device *dev, u32_t channel)
{
	int ret;
	const struct dma_qmsi_config_info *info = dev->config->config_info;

	ret = qm_dma_transfer_start(info->instance, channel);

	CYCLE_NOP;

	return ret;
}

static int dma_qmsi_transfer_stop(struct device *dev, u32_t channel)
{
	const struct dma_qmsi_config_info *info = dev->config->config_info;

	return qm_dma_transfer_terminate(info->instance, channel);
}

static int dma_qmsi_stop(struct device *dev, u32_t channel)
{
	const struct dma_qmsi_config_info *info = dev->config->config_info;

	return qm_dma_transfer_terminate(info->instance, channel);
}

static const struct dma_driver_api dma_funcs = {
	.channel_config = dma_qmsi_channel_config,
	.transfer_config = dma_qmsi_transfer_config,
	.transfer_start = dma_qmsi_transfer_start,
	.transfer_stop = dma_qmsi_transfer_stop,
	.config = dma_qmsi_chan_config,
	.start = dma_qmsi_start,
	.stop = dma_qmsi_stop
};

#ifdef CONFIG_DEVICE_POWER_MANAGEMENT
static void dma_qmsi_set_power_state(struct device *dev, u32_t power_state)
{
	struct dma_qmsi_driver_data *ctx = dev->driver_data;

	ctx->device_power_state = power_state;
}

static u32_t dma_qmsi_get_power_state(struct device *dev)
{
	struct dma_qmsi_driver_data *ctx = dev->driver_data;

	return ctx->device_power_state;
}
#else
#define dma_qmsi_set_power_state(...)
#endif

int dma_qmsi_init(struct device *dev)
{
	const struct dma_qmsi_config_info *info = dev->config->config_info;

	dma_qmsi_config(dev);
	qm_dma_init(info->instance);
	dma_qmsi_set_power_state(dev, DEVICE_PM_ACTIVE_STATE);
	return 0;
}

static const struct dma_qmsi_config_info dma_qmsi_config_data = {
	.instance = QM_DMA_0,
};

static struct dma_qmsi_driver_data dma_qmsi_dev_data;

#ifdef CONFIG_DEVICE_POWER_MANAGEMENT
static int dma_suspend_device(struct device *dev)
{
	const struct dma_qmsi_config_info *info = dev->config->config_info;
	struct dma_qmsi_driver_data *ctx = dev->driver_data;

	qm_dma_save_context(info->instance, &ctx->saved_ctx);
	dma_qmsi_set_power_state(dev, DEVICE_PM_SUSPEND_STATE);

	return 0;
}

static int dma_resume_device(struct device *dev)
{
	const struct dma_qmsi_config_info *info = dev->config->config_info;
	struct dma_qmsi_driver_data *ctx = dev->driver_data;

	qm_dma_restore_context(info->instance, &ctx->saved_ctx);
	dma_qmsi_set_power_state(dev, DEVICE_PM_ACTIVE_STATE);

	return 0;
}

static int dma_qmsi_device_ctrl(struct device *dev, u32_t ctrl_command,
				void *context)
{
	if (ctrl_command == DEVICE_PM_SET_POWER_STATE) {
		if (*((u32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
			return dma_suspend_device(dev);
		} else if (*((u32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
			return dma_resume_device(dev);
		}
	} else if (ctrl_command == DEVICE_PM_GET_POWER_STATE) {
		*((u32_t *)context) = dma_qmsi_get_power_state(dev);
	}

	return 0;
}
#endif

DEVICE_DEFINE(dma_qmsi, CONFIG_DMA_0_NAME, &dma_qmsi_init, dma_qmsi_device_ctrl,
	      &dma_qmsi_dev_data, &dma_qmsi_config_data, POST_KERNEL,
	      CONFIG_KERNEL_INIT_PRIORITY_DEVICE, (void *)&dma_funcs);

static void dma_qmsi_config(struct device *dev)
{
	ARG_UNUSED(dev);

	IRQ_CONNECT(IRQ_GET_NUMBER(QM_IRQ_DMA_0_INT_0), CONFIG_DMA_0_IRQ_PRI,
			qm_dma_0_isr_0, DEVICE_GET(dma_qmsi), 0);
	irq_enable(IRQ_GET_NUMBER(QM_IRQ_DMA_0_INT_0));
	QM_IR_UNMASK_INTERRUPTS(QM_INTERRUPT_ROUTER->dma_0_int_0_mask);

	IRQ_CONNECT(IRQ_GET_NUMBER(QM_IRQ_DMA_0_INT_1), CONFIG_DMA_0_IRQ_PRI,
				qm_dma_0_isr_1, DEVICE_GET(dma_qmsi), 0);
	irq_enable(IRQ_GET_NUMBER(QM_IRQ_DMA_0_INT_1));
	QM_IR_UNMASK_INTERRUPTS(QM_INTERRUPT_ROUTER->dma_0_int_1_mask);

#if (CONFIG_SOC_QUARK_SE_C1000)

	IRQ_CONNECT(IRQ_GET_NUMBER(QM_IRQ_DMA_0_INT_2), CONFIG_DMA_0_IRQ_PRI,
				qm_dma_0_isr_2, DEVICE_GET(dma_qmsi), 0);
	irq_enable(IRQ_GET_NUMBER(QM_IRQ_DMA_0_INT_2));
	QM_IR_UNMASK_INTERRUPTS(QM_INTERRUPT_ROUTER->dma_0_int_2_mask);

	IRQ_CONNECT(IRQ_GET_NUMBER(QM_IRQ_DMA_0_INT_3), CONFIG_DMA_0_IRQ_PRI,
				qm_dma_0_isr_3, DEVICE_GET(dma_qmsi), 0);
	irq_enable(IRQ_GET_NUMBER(QM_IRQ_DMA_0_INT_3));
	QM_IR_UNMASK_INTERRUPTS(QM_INTERRUPT_ROUTER->dma_0_int_3_mask);

	IRQ_CONNECT(IRQ_GET_NUMBER(QM_IRQ_DMA_0_INT_4), CONFIG_DMA_0_IRQ_PRI,
				qm_dma_0_isr_4, DEVICE_GET(dma_qmsi), 0);
	irq_enable(IRQ_GET_NUMBER(QM_IRQ_DMA_0_INT_4));
	QM_IR_UNMASK_INTERRUPTS(QM_INTERRUPT_ROUTER->dma_0_int_4_mask);

	IRQ_CONNECT(IRQ_GET_NUMBER(QM_IRQ_DMA_0_INT_5), CONFIG_DMA_0_IRQ_PRI,
				qm_dma_0_isr_5, DEVICE_GET(dma_qmsi), 0);
	irq_enable(IRQ_GET_NUMBER(QM_IRQ_DMA_0_INT_5));
	QM_IR_UNMASK_INTERRUPTS(QM_INTERRUPT_ROUTER->dma_0_int_5_mask);

	IRQ_CONNECT(IRQ_GET_NUMBER(QM_IRQ_DMA_0_INT_6), CONFIG_DMA_0_IRQ_PRI,
				qm_dma_0_isr_6, DEVICE_GET(dma_qmsi), 0);
	irq_enable(IRQ_GET_NUMBER(QM_IRQ_DMA_0_INT_6));
	QM_IR_UNMASK_INTERRUPTS(QM_INTERRUPT_ROUTER->dma_0_int_6_mask);

	IRQ_CONNECT(IRQ_GET_NUMBER(QM_IRQ_DMA_0_INT_7), CONFIG_DMA_0_IRQ_PRI,
				qm_dma_0_isr_7, DEVICE_GET(dma_qmsi), 0);
	irq_enable(IRQ_GET_NUMBER(QM_IRQ_DMA_0_INT_7));
	QM_IR_UNMASK_INTERRUPTS(QM_INTERRUPT_ROUTER->dma_0_int_7_mask);

#endif /* CONFIG_SOC_QUARK_SE_C1000 */

	IRQ_CONNECT(IRQ_GET_NUMBER(QM_IRQ_DMA_0_ERROR_INT),
		    CONFIG_DMA_0_IRQ_PRI, qm_dma_0_error_isr,
		    DEVICE_GET(dma_qmsi), 0);
	irq_enable(IRQ_GET_NUMBER(QM_IRQ_DMA_0_ERROR_INT));
#if (QM_LAKEMONT)
	QM_INTERRUPT_ROUTER->dma_0_error_int_mask &= ~QM_IR_DMA_ERROR_HOST_MASK;
#elif (QM_SENSOR)
	QM_INTERRUPT_ROUTER->dma_0_error_int_mask &= ~QM_IR_DMA_ERROR_SS_MASK;
#endif

}