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/* * Copyright (c) 2017 Linaro Limited * * SPDX-License-Identifier: Apache-2.0 */ #include <arm/armv7-m.dtsi> #include <st/mem.h> / { flash0: flash { reg = <0x08000000 DT_FLASH_SIZE>; }; sram0: memory { reg = <0x20000000 DT_SRAM_SIZE>; }; soc { usart1: serial@40011000 { compatible = "st,stm32-usart", "st,stm32-uart"; reg = <0x40011000 0x400>; interrupts = <37 0>; status = "disabled"; label = "UART_1"; }; usart2: serial@40004400 { compatible = "st,stm32-usart", "st,stm32-uart"; reg = <0x40004400 0x400>; interrupts = <38 0>; status = "disabled"; label = "UART_2"; }; usart6: serial@40011400 { compatible = "st,stm32-usart", "st,stm32-uart"; reg = <0x40011400 0x400>; interrupts = <71 0>; status = "disabled"; label = "UART_6"; }; }; }; &nvic { arm,num-irq-priority-bits = <4>; }; |