#
# Copyright (c) 2016 Intel Corporation
# Copyright (c) 2016, Freescale Semiconductor, Inc.
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
#     http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#

config SOC_FAMILY_KINETIS
	bool
	# omit prompt to signify a "hidden" option
	default n

if SOC_FAMILY_KINETIS
config SOC_FAMILY
	string
	default "nxp_kinetis"
endif

source "arch/arm/soc/nxp_kinetis/*/Kconfig.soc"

config SOC_PART_NUMBER
	string
	default SOC_PART_NUMBER_KINETIS_K6X if SOC_SERIES_KINETIS_K6X
	help
	This string holds the full part number of the SoC. It is a hidden option
	that you should not set directly. The part number selection choice defines
	the default value for this string.

config HAS_OSC
	bool
	default n
	help
	Set if the oscillator (OSC) module is present in the SoC.

config HAS_MCG
	bool
	default n
	help
	Set if the multipurpose clock generator (MCG) module is present in the SoC.

config HAS_RNGA
	bool
	default n
	help
	Set if the random number generator accelerator (RNGA) module is present in the SoC.

if HAS_OSC

choice
	prompt "Oscillator Mode Selection"
	default OSC_EXTERNAL

config OSC_EXTERNAL
	bool "External reference clock"
	help
	Set this option to use the oscillator in external reference clock mode.

config OSC_LOW_POWER
	bool "Low power oscillator"
	help
	Set this option to use the oscillator in low-power mode.

config OSC_HIGH_GAIN
	bool "High gain oscillator"
	help
	Set this option to use the oscillator in high-gain mode.

endchoice

config OSC_XTAL0_FREQ
	int "External oscillator frequency"
	help
	Set the external oscillator frequency in Hz. This should be set by the
	board's defconfig.

endif # HAS_OSC

if HAS_MCG

config MCG_PRDIV0
	hex "PLL external reference divider"
	range 0 0x18
	default 0
	help
	Selects the amount to divide down the external reference clock for the PLL.
	The resulting frequency must be in the range of 2 MHz to 4 MHz.

config MCG_VDIV0
	hex "VCO 0 divider"
	range 0 0x1F
	default 0
	help
	Selects the amount to divide the VCO output of the PLL. The VDIV 0 bits
	establish the multiplication factor (M) applied to the reference clock
	frequency.

config MCG_FCRDIV
	int "Fast internal reference clock divider"
	range 0 7
	default 1
	help
	Selects the amount to divide down the fast internal reference clock. The
	resulting frequency must be in the range 31.25 kHz to 4 MHz.

endif # HAS_MCG