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# Kconfig.dw - DesignWare SPI driver configuration options # # # Copyright (c) 2015-2016 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. # You may obtain a copy of the License at # # http://www.apache.org/licenses/LICENSE-2.0 # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # See the License for the specific language governing permissions and # limitations under the License. # menuconfig SPI_DW bool prompt "Designware SPI controller driver" depends on SPI default n help Enable support for Designware's SPI controllers. if SPI_DW config SPI_DW_ARC_AUX_REGS bool "Registers are part of ARC auxiliary registers" depends on SPI_DW && ARC default y help SPI IP block registers are part of user extended auxiliary registers and thus their access is different than memory mapped registers. choice depends on SPI_DW prompt "DesignWare SPI interrupt management logic" default SPI_DW_INTERRUPT_SINGLE_LINE config SPI_DW_INTERRUPT_SINGLE_LINE bool "Single interrupt line for all interrupts" help Only one line is used to trigger interrupts: RX, TX and ERROR interrupt go all through that line, undifferentiated. config SPI_DW_INTERRUPT_SEPARATED_LINES bool "One line per-interrupt type (RX, TX and ERROR)" help Each interrupt gets a dedicated line endchoice config SPI_DW_CLOCK_GATE bool "Enable glock gating" depends on SPI_DW && SOC_QUARK_SE select CLOCK_CONTROL default n config SPI_DW_CLOCK_GATE_DRV_NAME string depends on SPI_DW_CLOCK_GATE default "" config SPI_DW_FIFO_DEPTH int "Rx and Tx FIFO Depth" help Corresponds to the SSI_TX_FIFO_DEPTH and SSI_RX_FIFO_DEPTH of the DesignWare Syncrhonous Serial Interface. Depth ranges from 2-256. config SPI_DW_PORT_0_CLOCK_GATE_SUBSYS int "Clock controller's subsystem" depends on SPI_DW_CLOCK_GATE config SPI_DW_PORT_1_CLOCK_GATE_SUBSYS int "Clock controller's subsystem" depends on SPI_DW_CLOCK_GATE endif # SPI_DW |