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# Kconfig.intel - Intel SPI driver configuration options
#
#
# Copyright (c) 2015-2016 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
#     http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#

menuconfig SPI_INTEL
	bool
	prompt "Intel SPI controller driver"
	depends on SPI && CPU_MINUTEIA
	default n
	help
	  Enable support for Intel's SPI controllers. Such controller
	  was formelly found on XScale chips. It can be found nowadays
	  on CEXXXX Intel media controller and Quark CPU (2 of them).

if SPI_INTEL

choice
depends on SPI_INTEL
prompt "Intel SPI interrupt trigger condition"
default SPI_INTEL_RISING_EDGE

config SPI_INTEL_FALLING_EDGE
	bool "Falling edge"
	help
	  "Intel SPI uses falling edge interrupt"

config SPI_INTEL_RISING_EDGE
	bool "Rising edge"
	help
	  "Intel SPI uses rising edge interrupt"

config SPI_INTEL_LEVEL_HIGH
	bool "Level high"
	help
	  "Intel SPI uses level high interrupt"

config SPI_INTEL_LEVEL_LOW
	bool "Level low"
	help
	  "Intel SPI uses level low interrupt"
endchoice

config	SPI_INTEL_VENDOR_ID
	hex "PCI Vendor ID"
	depends on SPI_INTEL && PCI
	default 0x8086

config	SPI_INTEL_DEVICE_ID
	hex "PCI Device ID"
	depends on SPI_INTEL && PCI
	default 0x935

config	SPI_INTEL_CLASS
	hex "PCI class"
	depends on SPI_INTEL && PCI
	default 0x0C

config  SPI_INTEL_CS_GPIO
	bool "SPI port CS pin is controlled via a GPIO port"
	depends on SPI_INTEL && GPIO
	default n

config	SPI_INTEL_PORT_0
	bool
	prompt "Intel SPI port 0"
	depends on SPI_INTEL
	default n
	help
	  Enable Intel's SPI controller port 0.

config  SPI_INTEL_PORT_0_DRV_NAME
	string
	prompt "Intel SPI port 0 device name"
	depends on SPI_INTEL_PORT_0
	default "SPI_0"

config	SPI_INTEL_PORT_0_BUS
	int "Port 0 PCI Bus"
	depends on SPI_INTEL_PORT_0 && PCI

config  SPI_INTEL_PORT_0_DEV
	int "Port 0 PCI Dev"
	depends on SPI_INTEL_PORT_0 && PCI

config  SPI_INTEL_PORT_0_FUNCTION
	int "Port 0 PCI function"
	depends on SPI_INTEL_PORT_0 && PCI

config  SPI_INTEL_PORT_0_REGS
	hex
	prompt "Port 0 registers address"
	depends on SPI_INTEL_PORT_0

config  SPI_INTEL_PORT_0_IRQ
	int
	prompt "Port 0 interrupt"
	depends on SPI_INTEL_PORT_0

config  SPI_INTEL_PORT_0_PRI
	int
	prompt "Port 0 interrupt priority"
	depends on SPI_INTEL_PORT_0

config  SPI_INTEL_PORT_0_CS_GPIO_PORT
	string
	prompt "The GPIO port which is used to control CS"
	depends on SPI_INTEL_PORT_0 && SPI_INTEL_CS_GPIO
	default GPIO_DW_0_NAME

config  SPI_INTEL_PORT_0_CS_GPIO_PIN
	int "The GPIO PIN which is used to act as a CS pin"
	depends on SPI_INTEL_PORT_0 && SPI_INTEL_CS_GPIO
	default 0

config  SPI_INTEL_PORT_1
	bool
	prompt "Intel SPI port 1"
	depends on SPI_INTEL
	default n
	help
	  Enable Intel's SPI controller port 1.

config  SPI_INTEL_PORT_1_DRV_NAME
	string
	prompt "Intel SPI port 1 device name"
	depends on SPI_INTEL_PORT_1
	default "SPI_1"

config	SPI_INTEL_PORT_1_BUS
	int "Port 1 PCI Bus"
	depends on SPI_INTEL_PORT_1 && PCI

config  SPI_INTEL_PORT_1_DEV
	int "Port 1 PCI Dev"
	depends on SPI_INTEL_PORT_1 && PCI

config  SPI_INTEL_PORT_1_FUNCTION
	int "Port 1 PCI function"
	depends on SPI_INTEL_PORT_1 && PCI

config  SPI_INTEL_PORT_1_REGS
	hex
	prompt "Port 1 registers address"
	depends on SPI_INTEL_PORT_1

config  SPI_INTEL_PORT_1_IRQ
	int
	prompt "Port 1 interrupt"
	depends on SPI_INTEL_PORT_1

config  SPI_INTEL_PORT_1_PRI
	int
	prompt "Port 0 interrupt priority"
	depends on SPI_INTEL_PORT_1

config  SPI_INTEL_PORT_1_CS_GPIO_PORT
	string
	prompt "The GPIO port which is used to control CS"
	depends on SPI_INTEL_PORT_1 && SPI_INTEL_CS_GPIO
	default GPIO_DW_0_NAME

config  SPI_INTEL_PORT_1_CS_GPIO_PIN
	int "The GPIO PIN which is used to act as a CS pin"
	depends on SPI_INTEL_PORT_1 && SPI_INTEL_CS_GPIO
	default 0

endif # SPI_INTEL