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# Copyright (c) 2014 Wind River Systems, Inc.
# Copyright (c) 2015-2016 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
if SOC_QUARK_SE_SS
config SOC
default quark_se_ss
config NUM_IRQ_PRIO_LEVELS
# This processor supports only 2 priority levels:
# 0 for Fast Interrupts (FIRQs) and 1 for Regular Interrupts (IRQs).
default 2
config NUM_REGULAR_IRQ_PRIO_LEVELS
# This processor supports only 1 Regular Interrupt priority level (1).
default 1
config NUM_IRQS
# must be > the highest interrupt number used
default 68
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 32000000
config FLASH_BASE_ADDRESS
default 0x40000000
config FLASH_SIZE
default 152
config SRAM_BASE_ADDRESS
default 0x4000 if NSIM
default 0xa8000400
config SRAM_SIZE
default 16 if NSIM
default 24
config DCCM_BASE_ADDRESS
default 0x80000000
config DCCM_SIZE
default 8
if GPIO
config GPIO_DW
def_bool y
if GPIO_DW
config GPIO_DW_BOTHEDGES_SUPPORT
default n
config GPIO_DW_0
def_bool y
if GPIO_DW_0
config GPIO_DW_0_PRI
default 2
endif # GPIO_DW_0
config GPIO_DW_1
def_bool y
if GPIO_DW_1
config GPIO_DW_1_PRI
default 2
endif # GPIO_DW_1
endif # GPIO_DW
endif # GPIO
if I2C
config I2C_QUARK_SE_SS
def_bool y
if I2C_QUARK_SE_SS
config I2C_QUARK_SE_SS_0
def_bool y
if I2C_QUARK_SE_SS_0
config I2C_QUARK_SE_SS_0_NAME
default "I2C_0"
config I2C_QUARK_SE_SS_0_DEFAULT_CFG
default 0x12
endif # I2C_QUARK_SE_SS_0
if I2C_QUARK_SE_SS_1
config I2C_QUARK_SE_SS_1_NAME
default "I2C_1"
config I2C_QUARK_SE_SS_1_DEFAULT_CFG
default 0x12
endif # I2C_QUARK_SE_SS_1
endif # I2C_QUARK_SE_SS
endif # I2C
if UART_NS16550
config UART_NS16550_PORT_0
def_bool y
if UART_NS16550_PORT_0
config UART_NS16550_PORT_0_NAME
default "UART_0"
config UART_NS16550_PORT_0_IRQ_PRI
default 1
config UART_NS16550_PORT_0_BAUD_RATE
default 115200
config UART_NS16550_PORT_0_OPTIONS
default 0
endif # UART_NS16550_PORT_0
config UART_NS16550_PORT_1
def_bool y
if UART_NS16550_PORT_1
config UART_NS16550_PORT_1_NAME
default "UART_1"
config UART_NS16550_PORT_1_IRQ_PRI
default 1
config UART_NS16550_PORT_1_BAUD_RATE
default 115200
config UART_NS16550_PORT_1_OPTIONS
default 0
endif # UART_NS16550_PORT_1
endif # UART_NS16550
if UART_CONSOLE
config UART_CONSOLE_ON_DEV_NAME
default "UART_1"
endif
if SPI
config SPI_DW
def_bool y
if SPI_DW
config SPI_DW_CLOCK_GATE
def_bool n
config SPI_DW_PORT_0
def_bool y
if SPI_DW_PORT_0
config SPI_DW_PORT_0_PRI
default 1
config SPI_DW_PORT_0_REGS
default 0x80010000
config SPI_DW_PORT_0_ERROR_IRQ
default 30
config SPI_DW_PORT_0_RX_IRQ
default 31
config SPI_DW_PORT_0_TX_IRQ
default 32
endif # SPI_DW_PORT_0
config SPI_DW_PORT_1
def_bool y
if SPI_DW_PORT_1
config SPI_DW_PORT_1_PRI
default 1
config SPI_DW_PORT_1_REGS
default 0x80010100
config SPI_DW_PORT_1_ERROR_IRQ
default 33
config SPI_DW_PORT_1_RX_IRQ
default 34
config SPI_DW_PORT_1_TX_IRQ
default 35
endif # SPI_DW_PORT_1
endif # SPI_DW
endif # SPI
endif #SOC_QUARK_SE_ARC
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