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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 | /* * Copyright (c) 2017 Linaro Limited * * SPDX-License-Identifier: Apache-2.0 */ #include <st/f4/stm32f407.dtsi> / { soc { pinctrl: pin-controller@40020000 { reg = <0x40020000 0x2C00>; gpioj: gpio@40022400 { compatible = "st,stm32-gpio"; gpio-controller; #gpio-cells = <2>; reg = <0x40022400 0x400>; clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000200>; label = "GPIOJ"; }; gpiok: gpio@40022800 { compatible = "st,stm32-gpio"; gpio-controller; #gpio-cells = <2>; reg = <0x40022800 0x400>; clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000400>; label = "GPIOK"; }; }; uart7: serial@40007800 { compatible = "st,stm32-uart"; reg = <0x40007800 0x400>; clocks = <&rcc STM32_CLOCK_BUS_APB1 0x40000000>; interrupts = <82 0>; status = "disabled"; label = "UART_7"; }; uart8: serial@40007c00 { compatible = "st,stm32-uart"; reg = <0x40007c00 0x400>; clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>; interrupts = <83 0>; status = "disabled"; label = "UART_8"; }; spi4: spi@40013400 { compatible = "st,stm32-spi"; #address-cells = <1>; #size-cells = <0>; reg = <0x40013400 0x400>; interrupts = <84 5>; status = "disabled"; label = "SPI_4"; }; i2s4: i2s@40013400 { compatible = "st,stm32-i2s"; #address-cells = <1>; #size-cells = <0>; reg = <0x40013400 0x400>; clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00002000>; interrupts = <84 5>; status = "disabled"; label = "I2S_4"; }; /* spi5/i2s5 is present on all STM32F429XX SoCs except * STM32F429vX SoCs. Delete node in stm32f429vX.dtsi. */ spi5: spi@40015000 { compatible = "st,stm32-spi"; #address-cells = <1>; #size-cells = <0>; reg = <0x40015000 0x400>; interrupts = <85 5>; status = "disabled"; label = "SPI_5"; }; i2s5: i2s@40015000 { compatible = "st,stm32-i2s"; #address-cells = <1>; #size-cells = <0>; reg = <0x40015000 0x400>; clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00100000>; interrupts = <85 5>; status = "disabled"; label = "I2S_5"; }; /* spi6/i2s6 is present on all STM32F429XX SoCs except * STM32F429vX SoCs. Delete node in stm32f429vX.dtsi. */ spi6: spi@40015400 { compatible = "st,stm32-spi"; #address-cells = <1>; #size-cells = <0>; reg = <0x40015400 0x400>; interrupts = <86 5>; status = "disabled"; label = "SPI_6"; }; i2s6: i2s@40015400 { compatible = "st,stm32-i2s"; #address-cells = <1>; #size-cells = <0>; reg = <0x40015400 0x400>; clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00200000>; interrupts = <86 5>; status = "disabled"; label = "I2S_6"; }; }; }; |