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# Kconfig - Memory Protection Unit (MPU) configuration options
#
# Copyright (c) 2017 Linaro Limited
#
# SPDX-License-Identifier: Apache-2.0
#
if CPU_HAS_MPU
config ARM_MPU
bool "ARM MPU Support"
select MEMORY_PROTECTION
select THREAD_STACK_INFO
select ARCH_HAS_EXECUTABLE_PAGE_BIT
select MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT if !(CPU_HAS_NXP_MPU || ARMV8_M_BASELINE || ARMV8_M_MAINLINE)
select MPU_REQUIRES_NON_OVERLAPPING_REGIONS if CPU_HAS_ARM_MPU && (ARMV8_M_BASELINE || ARMV8_M_MAINLINE)
help
MCU implements Memory Protection Unit.
Note that NXP MPU as well as ARMv8-M MPU does not require MPU regions
to have power-of-two alignment for base address and region size.
In addition to the above, ARMv8-M MPU requires the active MPU regions
be non-overlapping.
config ARM_MPU_REGION_MIN_ALIGN_AND_SIZE
int
default 32 if ARM_MPU
default 4
help
Minimum size (and alignment) of an ARM MPU region. Use this
symbol to guarantee minimum size and alignment of MPU regions.
A minimum 4-byte alignment is enforced in ARM builds without
support for Memory Protection.
config MPU_STACK_GUARD
bool "Thread Stack Guards"
depends on ARM_MPU
help
Enable Thread Stack Guards via MPU
config MPU_ALLOW_FLASH_WRITE
bool "Add MPU access to write to flash"
depends on ARM_MPU
help
Enable this to allow MPU RWX access to flash memory
config CUSTOM_SECTION_ALIGN
bool "Custom Section Align"
depends on ARM_MPU
help
MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT(ARMv7-M) sometimes cause memory
wasting in linker scripts defined memory sections. Use this symbol
to guarantee user custom section align size to avoid more memory used
for respect alignment. But that needs carefully configure MPU region
and sub-regions(ARMv7-M) to cover this feature.
config CUSTOM_SECTION_MIN_ALIGN_SIZE
int "Custom Section Align Size"
default 32
help
Custom algin size of memory section in linker scripts. Usually
it should consume less alignment memory. Alougth this alignment
size is configured by users, it must also respect the power of
two regulation if hardware requires.
endif # CPU_HAS_MPU
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