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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 | /* * Copyright (c) 2016 Cadence Design Systems, Inc. * SPDX-License-Identifier: Apache-2.0 */ #include <kernel.h> #include <arch/cpu.h> #include <kernel_structs.h> #include <inttypes.h> #include <kernel_arch_data.h> #include <misc/printk.h> #include <xtensa/specreg.h> #include <logging/log_ctrl.h> #ifdef XT_SIMULATOR #include <xtensa/simcall.h> #endif const NANO_ESF _default_esf = { {0xdeaddead}, /* sp */ 0xdeaddead, /* pc */ }; /* Need to do this as a macro since regnum must be an immediate value */ #define get_sreg(regnum_p) ({ \ unsigned int retval; \ __asm__ volatile( \ "rsr %[retval], %[regnum]\n\t" \ : [retval] "=r" (retval) \ : [regnum] "i" (regnum_p)); \ retval; \ }) /** * * @brief Fatal error handler * * This routine is called when fatal error conditions are detected by software * and is responsible only for reporting the error. Once reported, it then * invokes the user provided routine z_SysFatalErrorHandler() which is * responsible for implementing the error handling policy. * * The caller is expected to always provide a usable ESF. In the event that the * fatal error does not have a hardware generated ESF, the caller should either * create its own or use a pointer to the global default ESF <_default_esf>. * * @param reason the reason that the handler was called * @param pEsf pointer to the exception stack frame * * @return This function does not return. */ XTENSA_ERR_NORET void z_NanoFatalErrorHandler(unsigned int reason, const NANO_ESF *pEsf) { LOG_PANIC(); switch (reason) { case _NANO_ERR_HW_EXCEPTION: case _NANO_ERR_RESERVED_IRQ: break; #if defined(CONFIG_STACK_CANARIES) || defined(CONFIG_STACK_SENTINEL) case _NANO_ERR_STACK_CHK_FAIL: printk("***** Stack Check Fail! *****\n"); break; #endif /* CONFIG_STACK_CANARIES */ case _NANO_ERR_ALLOCATION_FAIL: printk("**** Kernel Allocation Failure! ****\n"); break; case _NANO_ERR_KERNEL_OOPS: printk("***** Kernel OOPS! *****\n"); break; case _NANO_ERR_KERNEL_PANIC: printk("***** Kernel Panic! *****\n"); break; default: printk("**** Unknown Fatal Error %d! ****\n", reason); break; } printk("Current thread ID = %p\n" "Faulting instruction address = 0x%x\n", k_current_get(), pEsf->pc); /* * Now that the error has been reported, call the user implemented * policy * to respond to the error. The decisions as to what responses are * appropriate to the various errors are something the customer must * decide. */ z_SysFatalErrorHandler(reason, pEsf); } #ifdef CONFIG_PRINTK static char *cause_str(unsigned int cause_code) { switch (cause_code) { case 0: return "illegal instruction"; case 1: return "syscall"; case 2: return "instr fetch error"; case 3: return "load/store error"; case 4: return "level-1 interrupt"; case 5: return "alloca"; case 6: return "divide by zero"; case 8: return "privileged"; case 9: return "load/store alignment"; case 12: return "instr PIF data error"; case 13: return "load/store PIF data error"; case 14: return "instr PIF addr error"; case 15: return "load/store PIF addr error"; case 16: return "instr TLB miss"; case 17: return "instr TLB multi hit"; case 18: return "instr fetch privilege"; case 20: return "inst fetch prohibited"; case 24: return "load/store TLB miss"; case 25: return "load/store TLB multi hit"; case 26: return "load/store privilege"; case 28: return "load prohibited"; case 29: return "store prohibited"; case 32: case 33: case 34: case 35: case 36: case 37: case 38: case 39: return "coprocessor disabled"; default: return "unknown/reserved"; } } #endif static inline unsigned int get_bits(int offset, int num_bits, unsigned int val) { int mask; mask = BIT(num_bits) - 1; val = val >> offset; return val & mask; } static void dump_exc_state(void) { #ifdef CONFIG_PRINTK unsigned int cause, ps; cause = get_sreg(EXCCAUSE); ps = get_sreg(PS); printk("Exception cause %d (%s):\n" " EPC1 : 0x%08x EXCSAVE1 : 0x%08x EXCVADDR : 0x%08x\n", cause, cause_str(cause), get_sreg(EPC_1), get_sreg(EXCSAVE_1), get_sreg(EXCVADDR)); printk("Program state (PS):\n" " INTLEVEL : %02d EXCM : %d UM : %d RING : %d WOE : %d\n", get_bits(0, 4, ps), get_bits(4, 1, ps), get_bits(5, 1, ps), get_bits(6, 2, ps), get_bits(18, 1, ps)); #ifndef __XTENSA_CALL0_ABI__ printk(" OWB : %02d CALLINC : %d\n", get_bits(8, 4, ps), get_bits(16, 2, ps)); #endif #endif /* CONFIG_PRINTK */ } XTENSA_ERR_NORET void FatalErrorHandler(void) { printk("*** Unhandled exception ****\n"); dump_exc_state(); z_NanoFatalErrorHandler(_NANO_ERR_HW_EXCEPTION, &_default_esf); } XTENSA_ERR_NORET void ReservedInterruptHandler(unsigned int intNo) { printk("*** Reserved Interrupt ***\n"); dump_exc_state(); printk("INTENABLE = 0x%x\n" "INTERRUPT = 0x%x (%x)\n", get_sreg(INTENABLE), (1 << intNo), intNo); z_NanoFatalErrorHandler(_NANO_ERR_RESERVED_IRQ, &_default_esf); } void exit(int return_code) { #ifdef XT_SIMULATOR __asm__ ( "mov a3, %[code]\n\t" "movi a2, %[call]\n\t" "simcall\n\t" : : [code] "r" (return_code), [call] "i" (SYS_exit) : "a3", "a2"); #else printk("exit(%d)\n", return_code); k_panic(); #endif } /** * * @brief Fatal error handler * * This routine implements the corrective action to be taken when the system * detects a fatal error. * * This sample implementation attempts to abort the current thread and allow * the system to continue executing, which may permit the system to continue * functioning with degraded capabilities. * * System designers may wish to enhance or substitute this sample * implementation to take other actions, such as logging error (or debug) * information to a persistent repository and/or rebooting the system. * * @param reason the fatal error reason * @param pEsf pointer to exception stack frame * * @return N/A */ XTENSA_ERR_NORET __weak void z_SysFatalErrorHandler(unsigned int reason, const NANO_ESF *pEsf) { ARG_UNUSED(pEsf); #if !defined(CONFIG_SIMPLE_FATAL_ERROR_HANDLER) #ifdef CONFIG_STACK_SENTINEL if (reason == _NANO_ERR_STACK_CHK_FAIL) { goto hang_system; } #endif if (reason == _NANO_ERR_KERNEL_PANIC) { goto hang_system; } if (k_is_in_isr() || z_is_thread_essential()) { printk("Fatal fault in %s! Spinning...\n", k_is_in_isr() ? "ISR" : "essential thread"); goto hang_system; } printk("Fatal fault in thread %p! Aborting.\n", _current); k_thread_abort(_current); hang_system: #else ARG_UNUSED(reason); #endif #ifdef XT_SIMULATOR exit(255 - reason); #else for (;;) { k_cpu_idle(); } #endif CODE_UNREACHABLE; } |