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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 | /* * Copyright (c) 2017 Linaro Limited. * * SPDX-License-Identifier: Apache-2.0 */ #include <device.h> #include <init.h> #include <kernel.h> #include <soc.h> #include <arch/arm/cortex_m/mpu/arm_core_mpu_dev.h> #include <arch/arm/cortex_m/mpu/arm_core_mpu.h> #include <misc/__assert.h> #include <linker/linker-defs.h> #define LOG_LEVEL CONFIG_MPU_LOG_LEVEL #include <logging/log.h> LOG_MODULE_DECLARE(mpu); /* * Global status variable holding the number of HW MPU region indices, which * have been reserved by the MPU driver to program the static (fixed) memory * regions. */ static u8_t static_regions_num; /* Global MPU configuration at system initialization. */ static void _mpu_init(void) { /* Enable clock for the Memory Protection Unit (MPU). */ CLOCK_EnableClock(kCLOCK_Sysmpu0); } /** * Get the number of supported MPU regions. */ static inline u8_t _get_num_regions(void) { return FSL_FEATURE_SYSMPU_DESCRIPTOR_COUNT; } /* @brief Partition sanity check * * This internal function performs run-time sanity check for * MPU region start address and size. * * @param part Pointer to the data structure holding the partition * information (must be valid). */ static int _mpu_partition_is_valid(const struct k_mem_partition *part) { /* Partition size must be a multiple of the minimum MPU region * size. Start address of the partition must align with the * minimum MPU region size. */ int partition_is_valid = (part->size != 0U) && ((part->size & (~(CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE - 1))) == part->size) && ((part->start & (CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE - 1)) == 0U); return partition_is_valid; } /* This internal function performs MPU region initialization. * * Note: * The caller must provide a valid region index. */ static void _region_init(const u32_t index, const struct nxp_mpu_region *region_conf) { u32_t region_base = region_conf->base; u32_t region_end = region_conf->end; u32_t region_attr = region_conf->attr.attr; if (index == 0U) { /* The MPU does not allow writes from the core to affect the * RGD0 start or end addresses nor the permissions associated * with the debugger; it can only write the permission fields * associated with the other masters. These protections * guarantee that the debugger always has access to the entire * address space. */ __ASSERT(region_base == SYSMPU->WORD[index][0], "Region %d base address got 0x%08x expected 0x%08x", index, region_base, (u32_t)SYSMPU->WORD[index][0]); __ASSERT(region_end == SYSMPU->WORD[index][1], "Region %d end address got 0x%08x expected 0x%08x", index, region_end, (u32_t)SYSMPU->WORD[index][1]); /* Changes to the RGD0_WORD2 alterable fields should be done * via a write to RGDAAC0. */ SYSMPU->RGDAAC[index] = region_attr; } else { SYSMPU->WORD[index][0] = region_base; SYSMPU->WORD[index][1] = region_end; SYSMPU->WORD[index][2] = region_attr; SYSMPU->WORD[index][3] = SYSMPU_WORD_VLD_MASK; } LOG_DBG("[%d] 0x%08x 0x%08x 0x%08x 0x%08x", index, (u32_t)SYSMPU->WORD[index][0], (u32_t)SYSMPU->WORD[index][1], (u32_t)SYSMPU->WORD[index][2], (u32_t)SYSMPU->WORD[index][3]); } static int _region_allocate_and_init(const u8_t index, const struct nxp_mpu_region *region_conf) { /* Attempt to allocate new region index. */ if (index > (_get_num_regions() - 1)) { /* No available MPU region index. */ LOG_ERR("Failed to allocate new MPU region %u\n", index); return -EINVAL; } LOG_DBG("Program MPU region at index 0x%x", index); /* Program region */ _region_init(index, region_conf); return index; } /** * This internal function is utilized by the MPU driver to combine a given * region attribute configuration and size and fill-in a driver-specific * structure with the correct MPU region attribute configuration. */ static inline void _get_region_attr_from_k_mem_partition_info( nxp_mpu_region_attr_t *p_attr, const k_mem_partition_attr_t *attr, u32_t base, u32_t size) { /* in NXP MPU the base address and size are not required * to determine region attributes */ (void) base; (void) size; p_attr->attr = attr->ap_attr; } /* This internal function programs an MPU region * of a given configuration at a given MPU index. */ static int _mpu_configure_region(const u8_t index, const struct k_mem_partition *new_region) { struct nxp_mpu_region region_conf; LOG_DBG("Configure MPU region at index 0x%x", index); /* Populate internal NXP MPU region configuration structure. */ region_conf.base = new_region->start; region_conf.end = (new_region->start + new_region->size - 1); _get_region_attr_from_k_mem_partition_info(®ion_conf.attr, &new_region->attr, new_region->start, new_region->size); /* Allocate and program region */ return _region_allocate_and_init(index, (const struct nxp_mpu_region *)®ion_conf); } #if defined(CONFIG_MPU_STACK_GUARD) /* This internal function partitions the SRAM MPU region */ static int _mpu_sram_partitioning(u8_t index, const struct k_mem_partition *p_region) { /* * The NXP MPU manages the permissions of the overlapping regions * doing the logical OR in between them, hence they can't be used * for stack/stack guard protection. For this reason we need to * perform a partitioning of the SRAM area in such a way that the * guard region does not overlap with the (background) SRAM regions * holding the default SRAM access permission configuration. * In other words, the SRAM is split in two different regions. */ /* * SRAM partitioning needs to be performed in a strict order. * First, we program a new MPU region with the default SRAM * access permissions for the SRAM area _after_ the stack * guard. Note that the permissions are stored in the global * array: * 'mpu_config.mpu_regions[]', on 'sram_region' index. */ struct nxp_mpu_region added_sram_region; added_sram_region.base = p_region->start + p_region->size; added_sram_region.end = mpu_config.mpu_regions[mpu_config.sram_region].end; added_sram_region.attr.attr = mpu_config.mpu_regions[mpu_config.sram_region].attr.attr; if (_region_allocate_and_init(index, (const struct nxp_mpu_region *)&added_sram_region) < 0) { return -EINVAL; } /* Increment, as an additional region index has been consumed. */ index++; /* Second, adjust the original SRAM region to end at the beginning * of the stack guard. */ struct nxp_mpu_region adjusted_sram_region; adjusted_sram_region.base = mpu_config.mpu_regions[mpu_config.sram_region].base; adjusted_sram_region.end = p_region->start - 1; adjusted_sram_region.attr.attr = mpu_config.mpu_regions[mpu_config.sram_region].attr.attr; _region_init(mpu_config.sram_region, (const struct nxp_mpu_region *)&adjusted_sram_region); return index; } #endif /* CONFIG_MPU_STACK_GUARD */ /* This internal function programs a set of given MPU regions * over a background memory area, optionally performing a * sanity check of the memory regions to be programmed. */ static int _mpu_configure_regions(const struct k_mem_partition *regions[], u8_t regions_num, u8_t start_reg_index, bool do_sanity_check) { int i; int reg_index = start_reg_index; for (i = 0; i < regions_num; i++) { if (regions[i]->size == 0U) { continue; } /* Non-empty region. */ if (do_sanity_check && (!_mpu_partition_is_valid(regions[i]))) { LOG_ERR("Partition %u: sanity check failed.", i); return -EINVAL; } #if defined(CONFIG_MPU_STACK_GUARD) if (regions[i]->attr.ap_attr == MPU_REGION_SU_RX) { /* Attempt to configure an MPU Stack Guard region; this * will require splitting of the underlying SRAM region * into two SRAM regions, leaving out the guard area to * be programmed afterwards. */ reg_index = _mpu_sram_partitioning(reg_index, regions[i]); } #endif /* CONFIG_MPU_STACK_GUARD */ if (reg_index == -EINVAL) { return reg_index; } reg_index = _mpu_configure_region(reg_index, regions[i]); if (reg_index == -EINVAL) { return reg_index; } /* Increment number of programmed MPU indices. */ reg_index++; } return reg_index; } /* This internal function programs the static MPU regions. * * It returns the number of MPU region indices configured. * * Note: * If the static MPU regions configuration has not been successfully * performed, the error signal is propagated to the caller of the function. */ static int _mpu_configure_static_mpu_regions(const struct k_mem_partition *static_regions[], const u8_t regions_num, const u32_t background_area_base, const u32_t background_area_end) { int mpu_reg_index = static_regions_num; /* In NXP MPU architecture the static regions are * programmed on top of SRAM region configuration. */ ARG_UNUSED(background_area_base); ARG_UNUSED(background_area_end); mpu_reg_index = _mpu_configure_regions(static_regions, regions_num, mpu_reg_index, true); static_regions_num = mpu_reg_index; return mpu_reg_index; } /* This internal function programs the dynamic MPU regions. * * It returns the number of MPU region indices configured. * * Note: * If the dynamic MPU regions configuration has not been successfully * performed, the error signal is propagated to the caller of the function. */ static int _mpu_configure_dynamic_mpu_regions(const struct k_mem_partition *dynamic_regions[], u8_t regions_num) { /* Reset MPU regions inside which dynamic memory regions may * be programmed. * * Re-programming these regions will temporarily leave memory areas * outside all MPU regions. * This might trigger memory faults if ISRs occurring during * re-programming perform access in those areas. */ arm_core_mpu_disable(); _region_init(mpu_config.sram_region, (const struct nxp_mpu_region *) &mpu_config.mpu_regions[mpu_config.sram_region]); arm_core_mpu_enable(); int mpu_reg_index = static_regions_num; /* In NXP MPU architecture the dynamic regions are * programmed on top of existing SRAM region configuration. */ mpu_reg_index = _mpu_configure_regions(dynamic_regions, regions_num, mpu_reg_index, false); if (mpu_reg_index != -EINVAL) { /* Disable the non-programmed MPU regions. */ for (int i = mpu_reg_index; i < _get_num_regions(); i++) { LOG_DBG("disable region 0x%x", i); /* Disable region */ SYSMPU->WORD[i][0] = 0; SYSMPU->WORD[i][1] = 0; SYSMPU->WORD[i][2] = 0; SYSMPU->WORD[i][3] = 0; } } return mpu_reg_index; } /* ARM Core MPU Driver API Implementation for NXP MPU */ /** * @brief enable the MPU */ void arm_core_mpu_enable(void) { /* Enable MPU */ SYSMPU->CESR |= SYSMPU_CESR_VLD_MASK; /* Make sure that all the registers are set before proceeding */ __DSB(); __ISB(); } /** * @brief disable the MPU */ void arm_core_mpu_disable(void) { /* Force any outstanding transfers to complete before disabling MPU */ __DMB(); /* Disable MPU */ SYSMPU->CESR &= ~SYSMPU_CESR_VLD_MASK; /* Clear MPU error status */ SYSMPU->CESR |= SYSMPU_CESR_SPERR_MASK; } #if defined(CONFIG_USERSPACE) static inline u32_t _mpu_region_get_base(u32_t r_index) { return SYSMPU->WORD[r_index][0]; } static inline u32_t _mpu_region_get_size(u32_t r_index) { /* <END> + 1 - <BASE> */ return (SYSMPU->WORD[r_index][1] + 1) - SYSMPU->WORD[r_index][0]; } /** * This internal function checks if region is enabled or not. * * Note: * The caller must provide a valid region number. */ static inline int _is_enabled_region(u32_t r_index) { return SYSMPU->WORD[r_index][3] & SYSMPU_WORD_VLD_MASK; } /** * This internal function checks if the given buffer is in the region. * * Note: * The caller must provide a valid region number. */ static inline int _is_in_region(u32_t r_index, u32_t start, u32_t size) { u32_t r_addr_start; u32_t r_addr_end; r_addr_start = SYSMPU->WORD[r_index][0]; r_addr_end = SYSMPU->WORD[r_index][1]; if (start >= r_addr_start && (start + size - 1) <= r_addr_end) { return 1; } return 0; } /** * @brief update configuration of an active memory partition */ void arm_core_mpu_mem_partition_config_update( struct k_mem_partition *partition, k_mem_partition_attr_t *new_attr) { /* Find the partition. ASSERT if not found. */ u8_t i; u8_t reg_index = _get_num_regions(); for (i = static_regions_num; i < _get_num_regions(); i++) { if (!_is_enabled_region(i)) { continue; } u32_t base = _mpu_region_get_base(i); if (base != partition->start) { continue; } u32_t size = _mpu_region_get_size(i); if (size != partition->size) { continue; } /* Region found */ reg_index = i; break; } __ASSERT(reg_index != _get_num_regions(), "Memory domain partition not found\n"); /* Modify the permissions */ partition->attr = *new_attr; _mpu_configure_region(reg_index, partition); } /** * @brief get the maximum number of available (free) MPU region indices * for configuring dynamic MPU partitions */ int arm_core_mpu_get_max_available_dyn_regions(void) { return _get_num_regions() - static_regions_num; } /** * This internal function checks if the region is user accessible or not * * Note: * The caller must provide a valid region number. */ static inline int _is_user_accessible_region(u32_t r_index, int write) { u32_t r_ap = SYSMPU->WORD[r_index][2]; if (write) { return (r_ap & MPU_REGION_WRITE) == MPU_REGION_WRITE; } return (r_ap & MPU_REGION_READ) == MPU_REGION_READ; } /** * @brief validate the given buffer is user accessible or not */ int arm_core_mpu_buffer_validate(void *addr, size_t size, int write) { u8_t r_index; /* Iterate through all MPU regions */ for (r_index = 0U; r_index < _get_num_regions(); r_index++) { if (!_is_enabled_region(r_index) || !_is_in_region(r_index, (u32_t)addr, size)) { continue; } /* For NXP MPU, priority is given to granting permission over * denying access for overlapping region. * So we can stop the iteration immediately once we find the * matched region that grants permission. */ if (_is_user_accessible_region(r_index, write)) { return 0; } } return -EPERM; } #endif /* CONFIG_USERSPACE */ /** * @brief configure fixed (static) MPU regions. */ void arm_core_mpu_configure_static_mpu_regions(const struct k_mem_partition *static_regions[], const u8_t regions_num, const u32_t background_area_start, const u32_t background_area_end) { if (_mpu_configure_static_mpu_regions(static_regions, regions_num, background_area_start, background_area_end) == -EINVAL) { __ASSERT(0, "Configuring %u static MPU regions failed\n", regions_num); } } /** * @brief configure dynamic MPU regions. */ void arm_core_mpu_configure_dynamic_mpu_regions(const struct k_mem_partition *dynamic_regions[], u8_t regions_num) { if (_mpu_configure_dynamic_mpu_regions(dynamic_regions, regions_num) == -EINVAL) { __ASSERT(0, "Configuring %u dynamic MPU regions failed\n", regions_num); } } /* NXP MPU Driver Initial Setup */ /* * @brief MPU default configuration * * This function provides the default configuration mechanism for the Memory * Protection Unit (MPU). */ static int nxp_mpu_init(struct device *arg) { ARG_UNUSED(arg); u32_t r_index; if (mpu_config.num_regions > _get_num_regions()) { /* Attempt to configure more MPU regions than * what is supported by hardware. As this operation * may be executed during system (pre-kernel) initialization, * we want to ensure we can detect an attempt to * perform invalid configuration. */ __ASSERT(0, "Request to configure: %u regions (supported: %u)\n", mpu_config.num_regions, _get_num_regions() ); return -1; } LOG_DBG("total region count: %d", _get_num_regions()); arm_core_mpu_disable(); /* Architecture-specific configuration */ _mpu_init(); /* Program fixed regions configured at SOC definition. */ for (r_index = 0U; r_index < mpu_config.num_regions; r_index++) { _region_init(r_index, &mpu_config.mpu_regions[r_index]); } /* Update the number of programmed MPU regions. */ static_regions_num = mpu_config.num_regions; arm_core_mpu_enable(); return 0; } #if defined(CONFIG_LOG) /* To have logging the driver needs to be initialized later */ SYS_INIT(nxp_mpu_init, PRE_KERNEL_2, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT); #else SYS_INIT(nxp_mpu_init, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT); #endif |