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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 | /* * Copyright (c) 2018 Intel Corporation * * SPDX-License-Identifier: Apache-2.0 */ /dts-v1/; #include <mem.h> #define DT_FLASH_SIZE DT_SIZE_K(8912) #define DT_SRAM_SIZE DT_SIZE_M(2048) #include <apollo_lake.dtsi> #include <dt-bindings/i2c/i2c.h> / { model = "up_squared"; compatible = "intel,apollo_lake"; chosen { zephyr,sram = &sram0; zephyr,flash = &flash0; zephyr,console = &uart0; zephyr,shell-uart = &uart0; zephyr,bt-uart = &uart1; zephyr,uart-pipe = &uart1; zephyr,bt-mon-uart = &uart1; }; soc { uart0: uart@81434000 { compatible = "ns16550"; reg = <0x81434000 0x1000>; label = "UART_0"; clock-frequency = <1843200>; interrupts = <4 IRQ_TYPE_LEVEL_LOW 3>; interrupt-parent = <&intc>; status = "ok"; current-speed = <115200>; }; uart1: uart@81432000 { compatible = "ns16550"; reg = <0x81432000 0x1000>; label = "UART_1"; clock-frequency = <1843200>; interrupts = <5 IRQ_TYPE_LEVEL_LOW 3>; interrupt-parent = <&intc>; status = "ok"; current-speed = <115200>; }; i2c0: i2c@81444000 { compatible = "snps,designware-i2c"; clock-frequency = <I2C_BITRATE_STANDARD>; #address-cells = <1>; #size-cells = <0>; reg = <0x81444000 0x1000>; interrupts = <27 IRQ_TYPE_LEVEL_LOW 3>; interrupt-parent = <&intc>; label = "I2C_0"; status = "ok"; }; i2c1: i2c@81442000 { compatible = "snps,designware-i2c"; clock-frequency = <I2C_BITRATE_STANDARD>; #address-cells = <1>; #size-cells = <0>; reg = <0x81442000 0x1000>; interrupts = <28 IRQ_TYPE_LEVEL_LOW 3>; interrupt-parent = <&intc>; label = "I2C_1"; status = "ok"; }; i2c2: i2c@81440000 { compatible = "snps,designware-i2c"; clock-frequency = <I2C_BITRATE_STANDARD>; #address-cells = <1>; #size-cells = <0>; reg = <0x81440000 0x1000>; interrupts = <29 IRQ_TYPE_LEVEL_LOW 3>; interrupt-parent = <&intc>; label = "I2C_2"; status = "ok"; }; i2c3: i2c@8143e000 { compatible = "snps,designware-i2c"; clock-frequency = <I2C_BITRATE_STANDARD>; #address-cells = <1>; #size-cells = <0>; reg = <0x8143e000 0x1000>; interrupts = <30 IRQ_TYPE_LEVEL_LOW 3>; interrupt-parent = <&intc>; label = "I2C_3"; status = "ok"; }; i2c4: i2c@8143c000 { compatible = "snps,designware-i2c"; clock-frequency = <I2C_BITRATE_STANDARD>; #address-cells = <1>; #size-cells = <0>; reg = <0x8143c000 0x1000>; interrupts = <31 IRQ_TYPE_LEVEL_LOW 3>; interrupt-parent = <&intc>; label = "I2C_4"; status = "ok"; }; i2c5: i2c@8143a000 { compatible = "snps,designware-i2c"; clock-frequency = <I2C_BITRATE_STANDARD>; #address-cells = <1>; #size-cells = <0>; reg = <0x8143a000 0x1000>; interrupts = <32 IRQ_TYPE_LEVEL_LOW 3>; interrupt-parent = <&intc>; label = "I2C_5"; status = "ok"; }; i2c6: i2c@81438000 { compatible = "snps,designware-i2c"; clock-frequency = <I2C_BITRATE_STANDARD>; #address-cells = <1>; #size-cells = <0>; reg = <0x81438000 0x1000>; interrupts = <33 IRQ_TYPE_LEVEL_LOW 3>; interrupt-parent = <&intc>; label = "I2C_6"; status = "ok"; }; i2c7: i2c@81436000 { compatible = "snps,designware-i2c"; clock-frequency = <I2C_BITRATE_STANDARD>; #address-cells = <1>; #size-cells = <0>; reg = <0x81436000 0x1000>; interrupts = <34 IRQ_TYPE_LEVEL_LOW 3>; interrupt-parent = <&intc>; label = "I2C_7"; status = "ok"; }; }; }; &gpio { status = "ok"; }; |