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#
# Copyright (c) 2014 Wind River Systems, Inc.
# Copyright (c) 2015-2016 Intel Corporation
#
# SPDX-License-Identifier: Apache-2.0
#

if SOC_QUARK_SE_C1000_SS

config SOC
	default "quark_se_c1000_ss"

config NUM_IRQ_PRIO_LEVELS
	# This processor supports only 2 priority levels:
	# 0 for Fast Interrupts (FIRQs) and 1 for Regular Interrupts (IRQs).
	default 2

config NUM_IRQS
	# must be > the highest interrupt number used
	default 68

config RGF_NUM_BANKS
	default 2

config SYS_CLOCK_HW_CYCLES_PER_SEC
	default 32000000

config HARVARD
	def_bool n

config QMSI
	def_bool y

config QMSI_BUILTIN
	def_bool y

if RTC

config RTC_QMSI
	def_bool y

endif # RTC

if PWM
config PWM_QMSI
	def_bool y
endif # PWM

if PINMUX
config PINMUX_QMSI
	def_bool y
endif

if GPIO

config GPIO_QMSI
	def_bool n

if GPIO_QMSI

config GPIO_QMSI_0
	def_bool y

config GPIO_QMSI_1
	def_bool y

endif # GPIO_QMSI

config GPIO_QMSI_SS
	def_bool y

if GPIO_QMSI_SS

config GPIO_QMSI_SS_0
	def_bool y

config GPIO_QMSI_SS_1
	def_bool y

endif # GPIO_QMSI_SS

endif # GPIO


if I2C

config I2C_QMSI
	def_bool n

if I2C_QMSI
config I2C_0
	def_bool y

config I2C_1
	def_bool y

config I2C_SDA_SETUP
	default 2

config I2C_SDA_TX_HOLD
	default 16

config I2C_SDA_RX_HOLD
	default 24

endif

config I2C_QMSI_SS
	def_bool y

if I2C_QMSI_SS
config I2C_SS_0
	def_bool y

config I2C_SS_1
	def_bool y

config I2C_SS_SDA_SETUP
	default 2

config I2C_SS_SDA_HOLD
	default 10

endif

endif # I2C

if ADC
config ADC_DW
	def_bool y
endif

if BT_H4

config UART_QMSI_0
	def_bool y

config UART_QMSI_0_HW_FC
	def_bool y

endif # BT_H4

if UART_QMSI

config UART_QMSI_1
	def_bool y

endif # UART_QMSI

if SPI

config SPI_DW
	def_bool y

if SPI_DW

config SPI_DW_FIFO_DEPTH
	default 7

config CLOCK_CONTROL
	def_bool y

config CLOCK_CONTROL_QUARK_SE
	def_bool y

config CLOCK_CONTROL_QUARK_SE_SENSOR
	def_bool y

config SPI_0
	def_bool y

config SPI_DW_PORT_0_INTERRUPT_SINGLE_LINE
	def_bool n

config SPI_DW_PORT_0_CLOCK_GATE
	def_bool y

config SPI_DW_PORT_0_CLOCK_GATE_DRV_NAME
	default CLOCK_CONTROL_QUARK_SE_SENSOR_DRV_NAME

config SPI_DW_PORT_0_CLOCK_GATE_SUBSYS
	default 3

config SPI_0_IRQ_PRI
	default 1

config SPI_1
	def_bool y

config SPI_DW_PORT_1_INTERRUPT_SINGLE_LINE
	def_bool n

config SPI_DW_PORT_1_CLOCK_GATE
	def_bool y

config SPI_DW_PORT_1_CLOCK_GATE_DRV_NAME
	default CLOCK_CONTROL_QUARK_SE_SENSOR_DRV_NAME

config SPI_DW_PORT_1_CLOCK_GATE_SUBSYS
	default 4

config SPI_1_IRQ_PRI
	default 1

endif # SPI_DW
endif # SPI

if AIO_COMPARATOR

config AIO_COMPARATOR_QMSI
	def_bool y

endif # AIO_COMPARATOR

if WATCHDOG

config WDT_QMSI
	def_bool y

config WDT_0_IRQ_PRI
	default 0

endif # WATCHDOG

if DMA

config DMA_QMSI
	def_bool y

endif # DMA

if COUNTER

config AON_COUNTER_QMSI
	def_bool y

config AON_TIMER_QMSI
	def_bool y

config AON_TIMER_IRQ_PRI
	default 0

endif # COUNTER

endif #SOC_QUARK_SE_C1000_SS