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#
# Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
#
# SPDX-License-Identifier: Apache-2.0
#
menuconfig UART_NRFX
bool "nRF UART nrfx drivers"
select SERIAL_HAS_DRIVER
select SERIAL_SUPPORT_INTERRUPT
select GPIO
depends on SOC_FAMILY_NRF
help
Enable support for nrfx UART drivers for nRF MCU series.
Peripherals with the same instance ID cannot be used together,
e.g. UART_0 and UARTE_0.
if UART_NRFX
# ----------------- port 0 -----------------
choice
prompt "UART Port 0 Driver type"
optional
config UART_0_NRF_UART
bool "nRF UART 0"
depends on HAS_HW_NRF_UART0
select NRF_UART_PERIPHERAL
help
Enable nRF UART without EasyDMA on port 0.
config UART_0_NRF_UARTE
bool "nRF UARTE 0"
depends on HAS_HW_NRF_UARTE0
select NRF_UARTE_PERIPHERAL
help
Enable nRF UART with EasyDMA on port 0.
endchoice
if UART_0_NRF_UART || UART_0_NRF_UARTE
config UART_0_INTERRUPT_DRIVEN
bool "Enable interrupt support on port 0"
depends on UART_INTERRUPT_DRIVEN
default y
help
This option enables UART interrupt support on port 0.
config UART_0_NRF_PARITY_BIT
bool "Enable parity bit"
help
Enable parity bit.
config UART_0_NRF_FLOW_CONTROL
bool "Enable flow control"
help
Enable flow control. If selected, additionally two pins, RTS and CTS
have to be configured.
config UART_0_NRF_TX_PIN
int "TX Pin Number"
range 0 47 if SOC_NRF52840_QIAA
range 0 31
help
The GPIO pin to use for TX.
config UART_0_NRF_RX_PIN
int "RX Pin Number"
range 0 47 if SOC_NRF52840_QIAA
range 0 31
help
The GPIO pin to use for RX.
config UART_0_NRF_CTS_PIN
int "CTS Pin Number"
range 0 47 if SOC_NRF52840_QIAA
range 0 31
depends on UART_0_NRF_FLOW_CONTROL
help
The GPIO pin to use for CTS.
config UART_0_NRF_RTS_PIN
int "RTS Pin Number"
range 0 47 if SOC_NRF52840_QIAA
range 0 31
depends on UART_0_NRF_FLOW_CONTROL
help
The GPIO pin to use for RTS.
config UART_0_NRF_TX_BUFFER_SIZE
int "Size of RAM buffer"
depends on UART_0_NRF_UARTE
range 1 65535
default 32
help
Size of the transmit buffer for API function: fifo_fill.
This value is limited by range of TXD.MAXCNT register for
particular SoC.
endif # UART_0_NRF_UART || UART_0_NRF_UARTE
# ----------------- port 1 -----------------
config UART_1_NRF_UARTE
bool "nRF UARTE 1"
depends on HAS_HW_NRF_UARTE1
select NRF_UARTE_PERIPHERAL
help
Enable nRF UART with EasyDMA on port 1.
if UART_1_NRF_UARTE
config UART_1_INTERRUPT_DRIVEN
bool "Enable interrupt support on port 1"
depends on UART_INTERRUPT_DRIVEN
default y
help
This option enables UART interrupt support on port 1.
config UART_1_NRF_PARITY_BIT
bool "Enable parity bit"
help
Enable parity bit.
config UART_1_NRF_FLOW_CONTROL
bool "Enable flow control"
help
Enable flow control. If selected, additionally two pins, RTS and CTS
have to be configured.
config UART_1_NRF_TX_PIN
int "TX Pin Number"
range 0 47 if SOC_NRF52840_QIAA
range 0 31
help
The GPIO pin to use for TX.
config UART_1_NRF_RX_PIN
int "RX Pin Number"
range 0 47 if SOC_NRF52840_QIAA
range 0 31
help
The GPIO pin to use for RX.
config UART_1_NRF_CTS_PIN
int "CTS Pin Number"
range 0 47 if SOC_NRF52840_QIAA
range 0 31
depends on UART_1_NRF_FLOW_CONTROL
help
The GPIO pin to use for CTS.
config UART_1_NRF_RTS_PIN
int "RTS Pin Number"
range 0 47 if SOC_NRF52840_QIAA
range 0 31
depends on UART_1_NRF_FLOW_CONTROL
help
The GPIO pin to use for RTS.
config UART_1_NRF_TX_BUFFER_SIZE
int "Size of RAM buffer"
range 1 65535
default 32
help
Size of the transmit buffer for API function: fifo_fill.
This value is limited by range of TXD.MAXCNT register for
particular SoC.
endif # UART_1_NRF_UARTE
config NRF_UART_PERIPHERAL
bool
config NRF_UARTE_PERIPHERAL
bool
endif # UART_NRFX
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