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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 | /******************************************************************************* * * Copyright(c) 2015,2016 Intel Corporation. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * * Neither the name of Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * ******************************************************************************/ /** * @file * @brief CDC ACM device class driver * * Driver for USB CDC ACM device class driver */ #include <kernel.h> #include <init.h> #include <uart.h> #include <string.h> #include <misc/byteorder.h> #include <usb/class/usb_cdc.h> #include <usb/usb_device.h> #include <usb/usb_common.h> #include "../usb_descriptor.h" #include "../composite.h" #ifndef CONFIG_UART_INTERRUPT_DRIVEN #error "CONFIG_UART_INTERRUPT_DRIVEN must be set for CDC ACM driver" #endif /* definitions */ #define SYS_LOG_LEVEL CONFIG_SYS_LOG_USB_CDC_ACM_LEVEL #include <logging/sys_log.h> #define DEV_DATA(dev) \ ((struct cdc_acm_dev_data_t * const)(dev)->driver_data) static struct uart_driver_api cdc_acm_driver_api; /* 115200bps, no parity, 1 stop bit, 8bit char */ #define CDC_ACM_DEFAUL_BAUDRATE {sys_cpu_to_le32(115200), 0, 0, 8} /* Size of the internal buffer used for storing received data */ #define CDC_ACM_BUFFER_SIZE (2 * CONFIG_CDC_ACM_BULK_EP_MPS) /* Max CDC ACM class request max data size */ #define CDC_CLASS_REQ_MAX_DATA_SIZE 8 /* Serial state notification timeout */ #define CDC_CONTROL_SERIAL_STATE_TIMEOUT_US 100000 struct device *cdc_acm_dev; static struct k_sem poll_wait_sem; /* Device data structure */ struct cdc_acm_dev_data_t { /* USB device status code */ enum usb_dc_status_code usb_status; /* Callback function pointer */ uart_irq_callback_t cb; /* Tx ready status. Signals when */ u8_t tx_ready; u8_t rx_ready; /* Rx ready status */ u8_t tx_irq_ena; /* Tx interrupt enable status */ u8_t rx_irq_ena; /* Rx interrupt enable status */ u8_t rx_buf[CDC_ACM_BUFFER_SIZE];/* Internal Rx buffer */ u32_t rx_buf_head; /* Head of the internal Rx buffer */ u32_t rx_buf_tail; /* Tail of the internal Rx buffer */ /* Interface data buffer */ #ifndef CONFIG_USB_COMPOSITE_DEVICE u8_t interface_data[CDC_CLASS_REQ_MAX_DATA_SIZE]; #endif /* CDC ACM line coding properties. LE order */ struct cdc_acm_line_coding line_coding; /* CDC ACM line state bitmap, DTE side */ u8_t line_state; /* CDC ACM serial state bitmap, DCE side */ u8_t serial_state; /* CDC ACM notification sent status */ u8_t notification_sent; }; /** * @brief Handler called for Class requests not handled by the USB stack. * * @param pSetup Information about the request to execute. * @param len Size of the buffer. * @param data Buffer containing the request result. * * @return 0 on success, negative errno code on fail. */ int cdc_acm_class_handle_req(struct usb_setup_packet *pSetup, s32_t *len, u8_t **data) { struct cdc_acm_dev_data_t * const dev_data = DEV_DATA(cdc_acm_dev); switch (pSetup->bRequest) { case SET_LINE_CODING: memcpy(&dev_data->line_coding, *data, sizeof(dev_data->line_coding)); SYS_LOG_DBG("\nCDC_SET_LINE_CODING %d %d %d %d", sys_le32_to_cpu(dev_data->line_coding.dwDTERate), dev_data->line_coding.bCharFormat, dev_data->line_coding.bParityType, dev_data->line_coding.bDataBits); break; case SET_CONTROL_LINE_STATE: dev_data->line_state = (u8_t)sys_le16_to_cpu(pSetup->wValue); SYS_LOG_DBG("CDC_SET_CONTROL_LINE_STATE 0x%x", dev_data->line_state); break; case GET_LINE_CODING: *data = (u8_t *)(&dev_data->line_coding); *len = sizeof(dev_data->line_coding); SYS_LOG_DBG("\nCDC_GET_LINE_CODING %d %d %d %d", sys_le32_to_cpu(dev_data->line_coding.dwDTERate), dev_data->line_coding.bCharFormat, dev_data->line_coding.bParityType, dev_data->line_coding.bDataBits); break; default: SYS_LOG_DBG("CDC ACM request 0x%x, value 0x%x", pSetup->bRequest, pSetup->wValue); return -EINVAL; } return 0; } /** * @brief EP Bulk IN handler, used to send data to the Host * * @param ep Endpoint address. * @param ep_status Endpoint status code. * * @return N/A. */ static void cdc_acm_bulk_in(u8_t ep, enum usb_dc_ep_cb_status_code ep_status) { struct cdc_acm_dev_data_t * const dev_data = DEV_DATA(cdc_acm_dev); ARG_UNUSED(ep_status); ARG_UNUSED(ep); dev_data->tx_ready = 1; k_sem_give(&poll_wait_sem); /* Call callback only if tx irq ena */ if (dev_data->cb && dev_data->tx_irq_ena) { dev_data->cb(cdc_acm_dev); } } /** * @brief EP Bulk OUT handler, used to read the data received from the Host * * @param ep Endpoint address. * @param ep_status Endpoint status code. * * @return N/A. */ static void cdc_acm_bulk_out(u8_t ep, enum usb_dc_ep_cb_status_code ep_status) { struct cdc_acm_dev_data_t * const dev_data = DEV_DATA(cdc_acm_dev); u32_t bytes_to_read, i, j, buf_head; u8_t tmp_buf[4]; ARG_UNUSED(ep_status); /* Check how many bytes were received */ usb_read(ep, NULL, 0, &bytes_to_read); buf_head = dev_data->rx_buf_head; /* * Quark SE USB controller is always storing data * in the FIFOs per 32-bit words. */ for (i = 0; i < bytes_to_read; i += 4) { usb_read(ep, tmp_buf, 4, NULL); for (j = 0; j < 4; j++) { if (i + j == bytes_to_read) { /* We read all the data */ break; } if (((buf_head + 1) % CDC_ACM_BUFFER_SIZE) == dev_data->rx_buf_tail) { /* FIFO full, discard data */ SYS_LOG_ERR("CDC buffer full!"); } else { dev_data->rx_buf[buf_head] = tmp_buf[j]; buf_head = (buf_head + 1) % CDC_ACM_BUFFER_SIZE; } } } dev_data->rx_buf_head = buf_head; dev_data->rx_ready = 1; /* Call callback only if rx irq ena */ if (dev_data->cb && dev_data->rx_irq_ena) { dev_data->cb(cdc_acm_dev); } } /** * @brief EP Interrupt handler * * @param ep Endpoint address. * @param ep_status Endpoint status code. * * @return N/A. */ static void cdc_acm_int_in(u8_t ep, enum usb_dc_ep_cb_status_code ep_status) { struct cdc_acm_dev_data_t * const dev_data = DEV_DATA(cdc_acm_dev); ARG_UNUSED(ep_status); dev_data->notification_sent = 1; SYS_LOG_DBG("CDC_IntIN EP[%x]\r", ep); } /** * @brief Callback used to know the USB connection status * * @param status USB device status code. * * @return N/A. */ static void cdc_acm_dev_status_cb(enum usb_dc_status_code status, u8_t *param) { struct cdc_acm_dev_data_t * const dev_data = DEV_DATA(cdc_acm_dev); ARG_UNUSED(param); /* Store the new status */ dev_data->usb_status = status; /* Check the USB status and do needed action if required */ switch (status) { case USB_DC_ERROR: SYS_LOG_DBG("USB device error"); break; case USB_DC_RESET: SYS_LOG_DBG("USB device reset detected"); break; case USB_DC_CONNECTED: SYS_LOG_DBG("USB device connected"); break; case USB_DC_CONFIGURED: SYS_LOG_DBG("USB device configured"); break; case USB_DC_DISCONNECTED: SYS_LOG_DBG("USB device disconnected"); break; case USB_DC_SUSPEND: SYS_LOG_DBG("USB device supended"); break; case USB_DC_RESUME: SYS_LOG_DBG("USB device resumed"); break; case USB_DC_UNKNOWN: default: SYS_LOG_DBG("USB unknown state"); break; } } /* Describe EndPoints configuration */ static struct usb_ep_cfg_data cdc_acm_ep_data[] = { { .ep_cb = cdc_acm_int_in, .ep_addr = CONFIG_CDC_ACM_INT_EP_ADDR }, { .ep_cb = cdc_acm_bulk_out, .ep_addr = CONFIG_CDC_ACM_OUT_EP_ADDR }, { .ep_cb = cdc_acm_bulk_in, .ep_addr = CONFIG_CDC_ACM_IN_EP_ADDR } }; /* Configuration of the CDC-ACM Device send to the USB Driver */ static struct usb_cfg_data cdc_acm_config = { .usb_device_description = NULL, .cb_usb_status = cdc_acm_dev_status_cb, .interface = { .class_handler = cdc_acm_class_handle_req, .custom_handler = NULL, .payload_data = NULL, }, .num_endpoints = NUMOF_ENDPOINTS_CDC_ACM, .endpoint = cdc_acm_ep_data }; /** * @brief Set the baud rate * * This routine set the given baud rate for the UART. * * @param dev CDC ACM device struct. * @param baudrate Baud rate. * * @return N/A. */ static void cdc_acm_baudrate_set(struct device *dev, u32_t baudrate) { struct cdc_acm_dev_data_t * const dev_data = DEV_DATA(dev); dev_data->line_coding.dwDTERate = sys_cpu_to_le32(baudrate); } /** * @brief Initialize UART channel * * This routine is called to reset the chip in a quiescent state. * It is assumed that this function is called only once per UART. * * @param dev CDC ACM device struct. * * @return 0 always. */ static int cdc_acm_init(struct device *dev) { int ret; cdc_acm_dev = dev; #ifdef CONFIG_USB_COMPOSITE_DEVICE ret = composite_add_function(&cdc_acm_config, FIRST_IFACE_CDC_ACM); if (ret < 0) { SYS_LOG_ERR("Failed to add a function"); return ret; } #else struct cdc_acm_dev_data_t * const dev_data = DEV_DATA(dev); cdc_acm_config.interface.payload_data = dev_data->interface_data; cdc_acm_config.usb_device_description = usb_get_device_descriptor(); /* Initialize the USB driver with the right configuration */ ret = usb_set_config(&cdc_acm_config); if (ret < 0) { SYS_LOG_ERR("Failed to config USB"); return ret; } /* Enable USB driver */ ret = usb_enable(&cdc_acm_config); if (ret < 0) { SYS_LOG_ERR("Failed to enable USB"); return ret; } #endif dev->driver_api = &cdc_acm_driver_api; k_sem_init(&poll_wait_sem, 0, UINT_MAX); return 0; } /** * @brief Fill FIFO with data * * @param dev CDC ACM device struct. * @param tx_data Data to transmit. * @param len Number of bytes to send. * * @return Number of bytes sent. */ static int cdc_acm_fifo_fill(struct device *dev, const u8_t *tx_data, int len) { struct cdc_acm_dev_data_t * const dev_data = DEV_DATA(dev); u32_t bytes_written = 0; if (dev_data->usb_status != USB_DC_CONFIGURED) { return 0; } dev_data->tx_ready = 0; /* FIXME: On Quark SE Family processor, restrict writing more than * 4 bytes into TX USB Endpoint. When more than 4 bytes are written, * sometimes (freq ~1/3000) first 4 bytes are repeated. * (example: abcdef prints as abcdabcdef) (refer Jira ZEP-2074). * Application should handle partial data transfer while writing * into USB TX Endpoint. */ #ifdef CONFIG_SOC_SERIES_QUARK_SE len = len > sizeof(u32_t) ? sizeof(u32_t) : len; #endif usb_write(CONFIG_CDC_ACM_IN_EP_ADDR, tx_data, len, &bytes_written); return bytes_written; } /** * @brief Read data from FIFO * * @param dev CDC ACM device struct. * @param rx_data Pointer to data container. * @param size Container size. * * @return Number of bytes read. */ static int cdc_acm_fifo_read(struct device *dev, u8_t *rx_data, const int size) { u32_t avail_data, bytes_read, i; struct cdc_acm_dev_data_t * const dev_data = DEV_DATA(dev); avail_data = (CDC_ACM_BUFFER_SIZE + dev_data->rx_buf_head - dev_data->rx_buf_tail) % CDC_ACM_BUFFER_SIZE; if (avail_data > size) { bytes_read = size; } else { bytes_read = avail_data; } for (i = 0; i < bytes_read; i++) { rx_data[i] = dev_data->rx_buf[(dev_data->rx_buf_tail + i) % CDC_ACM_BUFFER_SIZE]; } dev_data->rx_buf_tail = (dev_data->rx_buf_tail + bytes_read) % CDC_ACM_BUFFER_SIZE; if (dev_data->rx_buf_tail == dev_data->rx_buf_head) { /* Buffer empty */ dev_data->rx_ready = 0; } return bytes_read; } /** * @brief Enable TX interrupt * * @param dev CDC ACM device struct. * * @return N/A. */ static void cdc_acm_irq_tx_enable(struct device *dev) { struct cdc_acm_dev_data_t * const dev_data = DEV_DATA(dev); dev_data->tx_irq_ena = 1; } /** * @brief Disable TX interrupt * * @param dev CDC ACM device struct. * * @return N/A. */ static void cdc_acm_irq_tx_disable(struct device *dev) { struct cdc_acm_dev_data_t * const dev_data = DEV_DATA(dev); dev_data->tx_irq_ena = 0; } /** * @brief Check if Tx IRQ has been raised * * @param dev CDC ACM device struct. * * @return 1 if a Tx IRQ is pending, 0 otherwise. */ static int cdc_acm_irq_tx_ready(struct device *dev) { struct cdc_acm_dev_data_t * const dev_data = DEV_DATA(dev); if (dev_data->tx_ready) { dev_data->tx_ready = 0; return 1; } return 0; } /** * @brief Enable RX interrupt * * @param dev CDC ACM device struct. * * @return N/A */ static void cdc_acm_irq_rx_enable(struct device *dev) { struct cdc_acm_dev_data_t * const dev_data = DEV_DATA(dev); dev_data->rx_irq_ena = 1; } /** * @brief Disable RX interrupt * * @param dev CDC ACM device struct. * * @return N/A. */ static void cdc_acm_irq_rx_disable(struct device *dev) { struct cdc_acm_dev_data_t * const dev_data = DEV_DATA(dev); dev_data->rx_irq_ena = 0; } /** * @brief Check if Rx IRQ has been raised * * @param dev CDC ACM device struct. * * @return 1 if an IRQ is ready, 0 otherwise. */ static int cdc_acm_irq_rx_ready(struct device *dev) { struct cdc_acm_dev_data_t * const dev_data = DEV_DATA(dev); if (dev_data->rx_ready) { dev_data->rx_ready = 0; return 1; } return 0; } /** * @brief Check if Tx or Rx IRQ is pending * * @param dev CDC ACM device struct. * * @return 1 if a Tx or Rx IRQ is pending, 0 otherwise. */ static int cdc_acm_irq_is_pending(struct device *dev) { struct cdc_acm_dev_data_t * const dev_data = DEV_DATA(dev); if (dev_data->tx_ready || dev_data->rx_ready) { return 1; } return 0; } /** * @brief Update IRQ status * * @param dev CDC ACM device struct. * * @return Always 1 */ static int cdc_acm_irq_update(struct device *dev) { ARG_UNUSED(dev); return 1; } /** * @brief Set the callback function pointer for IRQ. * * @param dev CDC ACM device struct. * @param cb Callback function pointer. * * @return N/A */ static void cdc_acm_irq_callback_set(struct device *dev, uart_irq_callback_t cb) { struct cdc_acm_dev_data_t * const dev_data = DEV_DATA(dev); dev_data->cb = cb; } #ifdef CONFIG_UART_LINE_CTRL /** * @brief Send serial line state notification to the Host * * This routine sends asynchronous notification of UART status * on the interrupt endpoint * * @param dev CDC ACM device struct. * @param ep_status Endpoint status code. * * @return N/A. */ static int cdc_acm_send_notification(struct device *dev, u16_t serial_state) { struct cdc_acm_dev_data_t * const dev_data = DEV_DATA(dev); struct cdc_acm_notification notification; u32_t cnt = 0; notification.bmRequestType = 0xA1; notification.bNotificationType = 0x20; notification.wValue = 0; notification.wIndex = 0; notification.wLength = sys_cpu_to_le16(sizeof(serial_state)); notification.data = sys_cpu_to_le16(serial_state); dev_data->notification_sent = 0; usb_write(CONFIG_CDC_ACM_INT_EP_ADDR, (const u8_t *)¬ification, sizeof(notification), NULL); /* Wait for notification to be sent */ while (!((volatile u8_t)dev_data->notification_sent)) { k_busy_wait(1); if (++cnt > CDC_CONTROL_SERIAL_STATE_TIMEOUT_US) { SYS_LOG_DBG("CDC ACM notification timeout!"); return -EIO; } } return 0; } /** * @brief Manipulate line control for UART. * * @param dev CDC ACM device struct * @param ctrl The line control to be manipulated * @param val Value to set the line control * * @return 0 if successful, failed otherwise. */ static int cdc_acm_line_ctrl_set(struct device *dev, u32_t ctrl, u32_t val) { struct cdc_acm_dev_data_t * const dev_data = DEV_DATA(dev); switch (ctrl) { case LINE_CTRL_BAUD_RATE: cdc_acm_baudrate_set(dev, val); return 0; case LINE_CTRL_DCD: dev_data->serial_state &= ~SERIAL_STATE_RX_CARRIER; if (val) { dev_data->serial_state |= SERIAL_STATE_RX_CARRIER; } cdc_acm_send_notification(dev, SERIAL_STATE_RX_CARRIER); return 0; case LINE_CTRL_DSR: dev_data->serial_state &= ~SERIAL_STATE_TX_CARRIER; if (val) { dev_data->serial_state |= SERIAL_STATE_TX_CARRIER; } cdc_acm_send_notification(dev, dev_data->serial_state); return 0; default: return -ENODEV; } return -ENOTSUP; } /** * @brief Manipulate line control for UART. * * @param dev CDC ACM device struct * @param ctrl The line control to be manipulated * @param val Value to set the line control * * @return 0 if successful, failed otherwise. */ static int cdc_acm_line_ctrl_get(struct device *dev, u32_t ctrl, u32_t *val) { struct cdc_acm_dev_data_t * const dev_data = DEV_DATA(dev); switch (ctrl) { case LINE_CTRL_BAUD_RATE: *val = sys_le32_to_cpu(dev_data->line_coding.dwDTERate); return 0; case LINE_CTRL_RTS: *val = (dev_data->line_state & SET_CONTROL_LINE_STATE_RTS) ? 1 : 0; return 0; case LINE_CTRL_DTR: *val = (dev_data->line_state & SET_CONTROL_LINE_STATE_DTR) ? 1 : 0; return 0; } return -ENOTSUP; } #endif /* CONFIG_UART_LINE_CTRL */ /* * @brief Poll the device for input. * * @return -ENOTSUP Since underlying USB device controller always uses * interrupts, polled mode UART APIs are not implemented for the UART interface * exported by CDC ACM driver. Apps should use fifo_read API instead. */ static int cdc_acm_poll_in(struct device *dev, unsigned char *c) { ARG_UNUSED(dev); ARG_UNUSED(c); return -ENOTSUP; } /* * @brief Output a character in polled mode. * * The UART poll method for USB UART is simulated by waiting till * we get the next BULK In upcall from the USB device controller or 100 ms. * * @return the same character which is sent */ static unsigned char cdc_acm_poll_out(struct device *dev, unsigned char c) { cdc_acm_fifo_fill(dev, &c, 1); k_sem_take(&poll_wait_sem, K_MSEC(100)); return c; } static struct uart_driver_api cdc_acm_driver_api = { .poll_in = cdc_acm_poll_in, .poll_out = cdc_acm_poll_out, .fifo_fill = cdc_acm_fifo_fill, .fifo_read = cdc_acm_fifo_read, .irq_tx_enable = cdc_acm_irq_tx_enable, .irq_tx_disable = cdc_acm_irq_tx_disable, .irq_tx_ready = cdc_acm_irq_tx_ready, .irq_rx_enable = cdc_acm_irq_rx_enable, .irq_rx_disable = cdc_acm_irq_rx_disable, .irq_rx_ready = cdc_acm_irq_rx_ready, .irq_is_pending = cdc_acm_irq_is_pending, .irq_update = cdc_acm_irq_update, .irq_callback_set = cdc_acm_irq_callback_set, #ifdef CONFIG_UART_LINE_CTRL .line_ctrl_set = cdc_acm_line_ctrl_set, .line_ctrl_get = cdc_acm_line_ctrl_get, #endif /* CONFIG_UART_LINE_CTRL */ }; static struct cdc_acm_dev_data_t cdc_acm_dev_data = { .usb_status = USB_DC_UNKNOWN, .line_coding = CDC_ACM_DEFAUL_BAUDRATE, }; DEVICE_INIT(cdc_acm, CONFIG_CDC_ACM_PORT_NAME, &cdc_acm_init, &cdc_acm_dev_data, NULL, APPLICATION, CONFIG_KERNEL_INIT_PRIORITY_DEVICE); |