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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 | /* * Copyright (c) 2016 Cadence Design Systems, Inc. * SPDX-License-Identifier: Apache-2.0 */ #ifndef XTENSA_SYS_IO_H #define XTENSA_SYS_IO_H #if !defined(_ASMLANGUAGE) #include <sys_io.h> /* Memory mapped registers I/O functions */ static ALWAYS_INLINE u32_t sys_read32(mem_addr_t addr) { return *(volatile u32_t *)addr; } static ALWAYS_INLINE void sys_write32(u32_t data, mem_addr_t addr) { *(volatile u32_t *)addr = data; } /* Memory bit manipulation functions */ static ALWAYS_INLINE void sys_set_bit(mem_addr_t addr, unsigned int bit) { u32_t temp = *(volatile u32_t *)addr; *(volatile u32_t *)addr = temp | (1 << bit); } static ALWAYS_INLINE void sys_clear_bit(mem_addr_t addr, unsigned int bit) { u32_t temp = *(volatile u32_t *)addr; *(volatile u32_t *)addr = temp & ~(1 << bit); } static ALWAYS_INLINE int sys_test_bit(mem_addr_t addr, unsigned int bit) { int temp = *(volatile int *)addr; return (int)(temp & (1 << bit)); } static ALWAYS_INLINE int sys_test_and_set_bit(mem_addr_t addr, unsigned int bit) { int retval = (*(volatile int *)addr) & (1 << bit); *(volatile int *)addr = (*(volatile int *)addr) | (1 << bit); return retval; } static ALWAYS_INLINE int sys_test_and_clear_bit(mem_addr_t addr, unsigned int bit) { int retval = (*(volatile int *)addr) & (1 << bit); *(volatile int *)addr = (*(volatile int *)addr) & ~(1 << bit); return retval; } static ALWAYS_INLINE void sys_bitfield_set_bit(mem_addr_t addr, unsigned int bit) { /* Doing memory offsets in terms of 32-bit values to prevent * alignment issues */ sys_set_bit(addr + ((bit >> 5) << 2), bit & 0x1F); } static ALWAYS_INLINE void sys_bitfield_clear_bit(mem_addr_t addr, unsigned int bit) { sys_clear_bit(addr + ((bit >> 5) << 2), bit & 0x1F); } static ALWAYS_INLINE int sys_bitfield_test_bit(mem_addr_t addr, unsigned int bit) { return sys_test_bit(addr + ((bit >> 5) << 2), bit & 0x1F); } static ALWAYS_INLINE int sys_bitfield_test_and_set_bit(mem_addr_t addr, unsigned int bit) { int ret; ret = sys_bitfield_test_bit(addr, bit); sys_bitfield_set_bit(addr, bit); return ret; } static ALWAYS_INLINE int sys_bitfield_test_and_clear_bit(mem_addr_t addr, unsigned int bit) { int ret; ret = sys_bitfield_test_bit(addr, bit); sys_bitfield_clear_bit(addr, bit); return ret; } #endif /* !_ASMLANGUAGE */ #endif /* XTENSA_SYS_IO_H */ |