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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 | # Kconfig - SPI driver configuration options # # Copyright (c) 2015 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. # You may obtain a copy of the License at # # http://www.apache.org/licenses/LICENSE-2.0 # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # See the License for the specific language governing permissions and # limitations under the License. # # # SPI Drivers # menuconfig SPI bool prompt "SPI hardware bus support" default n help Enable support for the SPI hardware bus. if SPI config SPI_DEBUG bool prompt "SPI drivers debug output" depends on SPI default n help Enable debug output for SPI drivers config SPI_INTEL bool prompt "Intel SPI controller driver" depends on SPI && CPU_MINUTEIA default n help Enable support for Intel's SPI controllers. Such controller was formelly found on XScale chips. It can be found nowadays on CEXXXX Intel media controller and Quark CPU (2 of them). choice depends on SPI_INTEL prompt "Intel SPI interrupt trigger condition" default SPI_INTEL_RISING_EDGE config SPI_INTEL_FALLING_EDGE bool "Falling edge" help "Intel SPI uses falling edge interrupt" config SPI_INTEL_RISING_EDGE bool "Rising edge" help "Intel SPI uses rising edge interrupt" config SPI_INTEL_LEVEL_HIGH bool "Level high" help "Intel SPI uses level high interrupt" config SPI_INTEL_LEVEL_LOW bool "Level low" help "Intel SPI uses level low interrupt" endchoice config SPI_INTEL_VENDOR_ID hex "PCI Vendor ID" depends on SPI_INTEL && PCI default 0x8086 config SPI_INTEL_DEVICE_ID hex "PCI Device ID" depends on SPI_INTEL && PCI default 0x935 config SPI_INTEL_CLASS hex "PCI class" depends on SPI_INTEL && PCI default 0x0C config SPI_INTEL_CS_GPIO bool "SPI port CS pin is controlled via a GPIO port" depends on SPI_INTEL && GPIO default n config SPI_INTEL_INIT_PRIORITY int prompt "Init priority" depends on SPI_INTEL default 60 help Device driver initialization priority. config SPI_INTEL_PORT_0 bool prompt "Intel SPI port 0" depends on SPI_INTEL default n help Enable Intel's SPI controller port 0. config SPI_INTEL_PORT_0_DRV_NAME string prompt "Intel SPI port 0 device name" depends on SPI_INTEL_PORT_0 default "intel_spi_0" config SPI_INTEL_PORT_0_BUS int "Port 0 PCI Bus" depends on SPI_INTEL_PORT_0 && PCI default 0 config SPI_INTEL_PORT_0_DEV int "Port 0 PCI Dev" depends on SPI_INTEL_PORT_0 && PCI default 0 config SPI_INTEL_PORT_0_FUNCTION int "Port 0 PCI function" depends on SPI_INTEL_PORT_0 && PCI default 0 config SPI_INTEL_PORT_0_REGS hex prompt "Port 0 registers address" depends on SPI_INTEL_PORT_0 default 0x00000000 config SPI_INTEL_PORT_0_IRQ int prompt "Port 0 interrupt" depends on SPI_INTEL_PORT_0 default 0 config SPI_INTEL_PORT_0_PRI int prompt "Port 0 interrupt priority" depends on SPI_INTEL_PORT_0 default 2 config SPI_INTEL_PORT_0_CS_GPIO_PORT string prompt "The GPIO port which is used to control CS" depends on SPI_INTEL_PORT_0 && SPI_INTEL_CS_GPIO default GPIO_DW_0_NAME config SPI_INTEL_PORT_0_CS_GPIO_PIN int "The GPIO PIN which is used to act as a CS pin" depends on SPI_INTEL_PORT_0 && SPI_INTEL_CS_GPIO default 0 config SPI_INTEL_PORT_1 bool prompt "Intel SPI port 1" depends on SPI_INTEL default n help Enable Intel's SPI controller port 1. config SPI_INTEL_PORT_1_DRV_NAME string prompt "Intel SPI port 1 device name" depends on SPI_INTEL_PORT_1 default "intel_spi_1" config SPI_INTEL_PORT_1_BUS int "Port 1 PCI Bus" depends on SPI_INTEL_PORT_1 && PCI default 0 config SPI_INTEL_PORT_1_DEV int "Port 1 PCI Dev" depends on SPI_INTEL_PORT_1 && PCI default 0 config SPI_INTEL_PORT_1_FUNCTION int "Port 1 PCI function" depends on SPI_INTEL_PORT_1 && PCI default 0 config SPI_INTEL_PORT_1_REGS hex prompt "Port 1 registers address" depends on SPI_INTEL_PORT_1 default 0x00000000 config SPI_INTEL_PORT_1_IRQ int prompt "Port 1 interrupt" depends on SPI_INTEL_PORT_1 default 0 config SPI_INTEL_PORT_1_PRI int prompt "Port 0 interrupt priority" depends on SPI_INTEL_PORT_1 default 2 config SPI_INTEL_PORT_1_CS_GPIO_PORT string prompt "The GPIO port which is used to control CS" depends on SPI_INTEL_PORT_1 && SPI_INTEL_CS_GPIO default GPIO_DW_0_NAME config SPI_INTEL_PORT_1_CS_GPIO_PIN int "The GPIO PIN which is used to act as a CS pin" depends on SPI_INTEL_PORT_1 && SPI_INTEL_CS_GPIO default 0 config SPI_DW bool prompt "Designware SPI controller driver" depends on SPI default n help Enable support for Designware's SPI controllers. config SPI_DW_ARC_AUX_REGS bool "Registers are part of ARC auxiliary registers" depends on SPI_DW && ARC default y help SPI IP block registers are part of user extended auxiliary registers and thus their access is different than memory mapped registers. config SPI_DW_CS_GPIO bool "SPI port CS pin is controlled via a GPIO port" depends on SPI_DW && GPIO default n config SPI_DW_INIT_PRIORITY int "Init priority" depends on SPI_DW default 60 help Device driver initialization priority. choice depends on SPI_DW prompt "DesignWare SPI interrupt trigger condition" default SPI_DW_RISING_EDGE config SPI_DW_FALLING_EDGE bool "Falling edge" help "DesignWare SPI uses falling edge interrupt" config SPI_DW_RISING_EDGE bool "Rising edge" help "DesignWare SPI uses rising edge interrupt" config SPI_DW_LEVEL_HIGH bool "Level high" help "DesignWare SPI uses level high interrupt" config SPI_DW_LEVEL_LOW bool "Level low" help "DesignWare SPI uses level low interrupt" endchoice config SPI_DW_CLOCK_GATE bool "Enable glock gating" depends on SPI_DW && SOC_QUARK_SE select CLOCK_CONTROL default n config SPI_DW_CLOCK_GATE_DRV_NAME string depends on SPI_DW_CLOCK_GATE default "" config SPI_DW_PORT_0 bool prompt "Designware SPI port 0" depends on SPI_DW default n help Enable Designware SPI controller port 0. config SPI_DW_PORT_0_CLOCK_GATE_SUBSYS int "Clock controller's subsystem" depends on SPI_DW_CLOCK_GATE default 0 config SPI_DW_PORT_0_CS_GPIO_PORT string prompt "The GPIO port which is used to control CS" depends on SPI_DW_PORT_0 && SPI_DW_CS_GPIO default GPIO_DW_0_NAME config SPI_DW_PORT_0_CS_GPIO_PIN int "The GPIO PIN which is used to act as a CS pin" depends on SPI_DW_PORT_0 && SPI_DW_CS_GPIO default 0 config SPI_DW_PORT_0_DRV_NAME string prompt "Designware SPI port 0 device name" depends on SPI_DW_PORT_0 default "spi_dw_0" config SPI_DW_PORT_0_REGS hex prompt "Port 0 registers address" depends on SPI_DW_PORT_0 default 0x00000000 config SPI_DW_PORT_0_IRQ int prompt "Port 0 interrupt" depends on SPI_DW_PORT_0 default 0 config SPI_DW_PORT_0_PRI int prompt "Port 0 interrupt priority" depends on SPI_DW_PORT_0 default 2 config SPI_DW_PORT_1 bool prompt "Designware SPI port 1" depends on SPI_DW default n help Enable Designware SPI controller port 1. config SPI_DW_PORT_1_CLOCK_GATE_SUBSYS int "Clock controller's subsystem" depends on SPI_DW_CLOCK_GATE default 0 config SPI_DW_PORT_1_CS_GPIO_PORT string prompt "The GPIO port which is used to control CS" depends on SPI_DW_PORT_0 && SPI_DW_CS_GPIO default GPIO_DW_0_NAME config SPI_DW_PORT_1_CS_GPIO_PIN int "The GPIO PIN which is used to act as a CS pin" depends on SPI_DW_PORT_0 && SPI_DW_CS_GPIO default 0 config SPI_DW_PORT_1_DRV_NAME string prompt "Designware SPI port 1 device name" depends on SPI_DW_PORT_1 default "spi_dw_1" config SPI_DW_PORT_1_REGS hex prompt "Port 1 registers address" depends on SPI_DW_PORT_1 default 0x00000000 config SPI_DW_PORT_1_IRQ int prompt "Port 1 interrupt" depends on SPI_DW_PORT_1 default 0 config SPI_DW_PORT_1_PRI int prompt "Port 0 interrupt priority" depends on SPI_DW_PORT_1 default 2 config SPI_QMSI bool "QMSI driver for SPI controller" depends on SPI && QMSI_DRIVERS default n help SPI driver implementation using QMSI library. QMSI is the Quark Microcontroller Software Interface, providing a common interface to the Quark family of microcontrollers. config SPI_QMSI_INIT_PRIORITY int prompt "QMSI driver init priority" depends on SPI_QMSI default 60 help Device driver initialization priority. config SPI_QMSI_PORT_0 bool prompt "QMSI SPI port 0" depends on SPI_QMSI default n help Enable QMSI's SPI controller port 0. config SPI_QMSI_CS_GPIO bool "SPI port CS pin is controlled via a GPIO port" depends on SPI_QMSI && GPIO default n config SPI_QMSI_PORT_0_DRV_NAME string prompt "QMSI SPI port 0 device name" depends on SPI_QMSI_PORT_0 default "spi_0" config SPI_QMSI_PORT_0_IRQ int prompt "Port 0 interrupt" depends on SPI_QMSI_PORT_0 default 0 config SPI_QMSI_PORT_0_PRI int prompt "Port 0 interrupt priority" depends on SPI_QMSI_PORT_0 default 2 config SPI_QMSI_PORT_0_CS_GPIO_PORT string prompt "The GPIO port which is used to control CS" depends on SPI_QMSI_PORT_0 && SPI_QMSI_CS_GPIO default GPIO_QMSI_0_NAME config SPI_QMSI_PORT_0_CS_GPIO_PIN int "The GPIO PIN which is used to act as a CS pin" depends on SPI_QMSI_PORT_0 && SPI_QMSI_CS_GPIO default 0 config SPI_QMSI_PORT_1 bool prompt "QMSI SPI port 1" depends on SPI_QMSI default n help Enable QMSI's SPI controller port 1. config SPI_QMSI_PORT_1_DRV_NAME string prompt "QMSI SPI port 1 device name" depends on SPI_QMSI_PORT_1 default "spi_1" config SPI_QMSI_PORT_1_IRQ int prompt "Port 1 interrupt" depends on SPI_QMSI_PORT_1 default 0 config SPI_QMSI_PORT_1_PRI int prompt "Port 0 interrupt priority" depends on SPI_QMSI_PORT_1 default 2 config SPI_QMSI_PORT_1_CS_GPIO_PORT string prompt "The GPIO port which is used to control CS" depends on SPI_QMSI_PORT_1 && SPI_QMSI_CS_GPIO default GPIO_QMSI_0_NAME config SPI_QMSI_PORT_1_CS_GPIO_PIN int "The GPIO PIN which is used to act as a CS pin" depends on SPI_QMSI_PORT_1 && SPI_QMSI_CS_GPIO default 0 endif |