Boot Linux faster!

Check our new training course

Boot Linux faster!

Check our new training course
and Creative Commons CC-BY-SA
lecture and lab materials

Bootlin logo

Elixir Cross Referencer

   1
   2
   3
   4
   5
   6
   7
   8
   9
  10
  11
  12
  13
  14
  15
  16
  17
  18
  19
  20
  21
  22
  23
  24
  25
  26
  27
  28
  29
  30
  31
  32
  33
  34
  35
  36
  37
  38
  39
  40
  41
  42
  43
  44
  45
  46
  47
  48
  49
  50
  51
  52
  53
  54
  55
  56
  57
  58
  59
  60
  61
  62
  63
  64
  65
  66
  67
  68
  69
  70
  71
  72
  73
  74
  75
  76
  77
  78
  79
  80
  81
  82
  83
  84
  85
  86
  87
  88
  89
  90
  91
  92
  93
  94
  95
  96
  97
  98
  99
 100
 101
 102
 103
 104
 105
 106
 107
 108
 109
 110
 111
 112
 113
 114
 115
 116
 117
 118
 119
 120
 121
 122
 123
 124
 125
 126
 127
 128
 129
 130
 131
 132
 133
 134
 135
 136
 137
 138
 139
 140
 141
 142
 143
 144
 145
 146
 147
 148
 149
 150
 151
 152
 153
 154
 155
 156
 157
 158
 159
 160
 161
 162
 163
 164
 165
 166
 167
 168
 169
 170
 171
 172
 173
 174
 175
 176
 177
 178
 179
 180
 181
 182
 183
 184
 185
 186
 187
 188
 189
 190
 191
 192
 193
 194
 195
 196
 197
 198
 199
 200
 201
 202
 203
 204
 205
 206
 207
 208
 209
 210
 211
 212
 213
 214
 215
 216
 217
 218
 219
 220
 221
 222
 223
 224
 225
 226
 227
 228
 229
 230
 231
 232
 233
 234
 235
 236
 237
 238
 239
 240
 241
 242
 243
 244
 245
 246
 247
 248
 249
 250
 251
 252
 253
 254
 255
 256
 257
 258
 259
 260
 261
 262
 263
 264
 265
 266
 267
 268
 269
 270
 271
 272
 273
 274
 275
 276
 277
 278
 279
 280
 281
 282
 283
 284
 285
 286
 287
 288
 289
 290
 291
 292
 293
 294
 295
 296
 297
 298
 299
 300
 301
 302
 303
 304
 305
 306
 307
 308
 309
 310
 311
 312
 313
 314
 315
 316
 317
 318
 319
 320
 321
 322
 323
 324
 325
 326
 327
 328
 329
 330
 331
 332
 333
 334
 335
 336
 337
 338
 339
 340
 341
 342
 343
 344
 345
 346
 347
 348
 349
 350
 351
 352
 353
 354
 355
 356
 357
 358
 359
 360
 361
 362
 363
 364
 365
 366
 367
 368
 369
 370
 371
 372
 373
 374
 375
 376
 377
 378
 379
 380
 381
 382
 383
 384
 385
 386
 387
 388
 389
 390
 391
 392
 393
 394
 395
 396
 397
 398
 399
 400
 401
 402
 403
 404
 405
 406
 407
 408
 409
 410
 411
 412
 413
 414
 415
 416
 417
 418
 419
 420
 421
 422
 423
 424
 425
 426
 427
 428
 429
 430
 431
 432
 433
 434
 435
 436
 437
 438
 439
 440
 441
 442
 443
 444
 445
 446
 447
 448
 449
 450
 451
 452
 453
 454
 455
 456
 457
 458
 459
 460
 461
 462
 463
 464
 465
 466
 467
 468
 469
 470
 471
 472
 473
 474
 475
 476
 477
 478
 479
 480
 481
 482
 483
 484
 485
 486
 487
 488
 489
 490
 491
 492
 493
 494
 495
 496
 497
 498
 499
 500
 501
 502
 503
 504
 505
 506
 507
 508
 509
 510
 511
 512
 513
 514
 515
 516
 517
 518
 519
 520
 521
 522
 523
 524
 525
 526
 527
 528
 529
 530
 531
 532
 533
 534
 535
 536
 537
 538
 539
 540
 541
 542
 543
 544
 545
 546
 547
 548
 549
 550
 551
 552
 553
 554
 555
 556
 557
 558
 559
 560
 561
 562
 563
 564
 565
 566
 567
 568
 569
 570
 571
 572
 573
 574
 575
 576
 577
 578
 579
 580
 581
 582
 583
 584
 585
 586
 587
 588
 589
 590
 591
 592
 593
 594
 595
 596
 597
 598
 599
 600
 601
 602
 603
 604
 605
 606
 607
 608
 609
 610
 611
 612
 613
 614
 615
 616
 617
 618
 619
 620
 621
 622
 623
 624
 625
 626
 627
 628
 629
 630
 631
 632
 633
 634
 635
 636
 637
 638
 639
 640
 641
 642
 643
 644
 645
 646
 647
 648
 649
 650
 651
 652
 653
 654
 655
 656
 657
 658
 659
 660
 661
 662
 663
 664
 665
 666
 667
 668
 669
 670
 671
 672
 673
 674
 675
 676
 677
 678
 679
 680
 681
 682
 683
 684
 685
 686
 687
 688
 689
 690
 691
 692
 693
 694
 695
 696
 697
 698
 699
 700
 701
 702
 703
 704
 705
 706
 707
 708
 709
 710
 711
 712
 713
 714
 715
 716
 717
 718
 719
 720
 721
 722
 723
 724
 725
 726
 727
 728
 729
 730
 731
 732
 733
 734
 735
 736
 737
 738
 739
 740
 741
 742
 743
 744
 745
 746
 747
 748
 749
 750
 751
 752
 753
 754
 755
 756
 757
 758
 759
 760
 761
 762
 763
 764
 765
 766
 767
 768
 769
 770
 771
 772
 773
 774
 775
 776
 777
 778
 779
 780
 781
 782
 783
 784
 785
 786
 787
 788
 789
 790
 791
 792
 793
 794
 795
 796
 797
 798
 799
 800
 801
 802
 803
 804
 805
 806
 807
 808
 809
 810
 811
 812
 813
 814
 815
 816
 817
 818
 819
 820
 821
 822
 823
 824
 825
 826
 827
 828
 829
 830
 831
 832
 833
 834
 835
 836
 837
 838
 839
 840
 841
 842
 843
 844
 845
 846
 847
 848
 849
 850
 851
 852
 853
 854
 855
 856
 857
 858
 859
 860
 861
 862
 863
 864
 865
 866
 867
 868
 869
 870
 871
 872
 873
 874
 875
 876
 877
 878
 879
 880
 881
 882
 883
 884
 885
 886
 887
 888
 889
 890
 891
 892
 893
 894
 895
 896
 897
 898
 899
 900
 901
 902
 903
 904
 905
 906
 907
 908
 909
 910
 911
 912
 913
 914
 915
 916
 917
 918
 919
 920
 921
 922
 923
 924
 925
 926
 927
 928
 929
 930
 931
 932
 933
 934
 935
 936
 937
 938
 939
 940
 941
 942
 943
 944
 945
 946
 947
 948
 949
 950
 951
 952
 953
 954
 955
 956
 957
 958
 959
 960
 961
 962
 963
 964
 965
 966
 967
 968
 969
 970
 971
 972
 973
 974
 975
 976
 977
 978
 979
 980
 981
 982
 983
 984
 985
 986
 987
 988
 989
 990
 991
 992
 993
 994
 995
 996
 997
 998
 999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613
1614
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649
1650
1651
1652
1653
1654
1655
1656
1657
1658
1659
1660
1661
1662
1663
1664
1665
1666
1667
1668
1669
1670
1671
1672
1673
1674
1675
1676
1677
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701
1702
1703
1704
1705
1706
1707
1708
1709
1710
1711
1712
1713
1714
1715
1716
1717
1718
1719
1720
1721
1722
1723
1724
1725
1726
1727
1728
1729
1730
1731
1732
1733
1734
1735
1736
1737
1738
1739
1740
1741
1742
1743
1744
1745
1746
1747
1748
1749
1750
1751
1752
1753
1754
1755
1756
1757
1758
1759
1760
1761
1762
1763
1764
1765
1766
1767
1768
1769
1770
1771
1772
1773
1774
1775
1776
1777
1778
1779
1780
1781
1782
1783
1784
1785
1786
1787
1788
1789
1790
1791
1792
1793
1794
1795
1796
1797
1798
1799
1800
1801
1802
1803
1804
1805
1806
1807
1808
1809
1810
1811
1812
1813
1814
1815
1816
1817
1818
1819
1820
1821
1822
1823
1824
1825
1826
1827
1828
1829
1830
1831
1832
1833
1834
1835
1836
1837
1838
1839
1840
1841
1842
1843
1844
1845
1846
1847
1848
1849
1850
1851
1852
1853
1854
1855
1856
1857
1858
1859
1860
1861
1862
1863
1864
1865
1866
1867
1868
1869
1870
1871
1872
1873
1874
1875
1876
1877
1878
1879
1880
1881
1882
1883
1884
1885
1886
1887
1888
1889
1890
1891
1892
1893
1894
1895
1896
1897
1898
1899
1900
1901
1902
1903
1904
1905
1906
1907
1908
1909
1910
1911
1912
1913
1914
1915
1916
1917
1918
1919
1920
1921
1922
1923
1924
1925
1926
1927
1928
1929
1930
1931
1932
1933
1934
1935
1936
1937
1938
1939
1940
1941
1942
1943
1944
1945
1946
1947
1948
1949
1950
1951
1952
1953
1954
1955
1956
1957
1958
1959
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969
1970
1971
1972
1973
1974
1975
1976
1977
1978
1979
1980
1981
1982
1983
1984
1985
1986
1987
1988
1989
1990
1991
1992
1993
1994
1995
1996
1997
1998
1999
2000
2001
2002
2003
2004
2005
2006
2007
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020
2021
2022
2023
2024
2025
2026
2027
2028
2029
2030
2031
2032
2033
2034
2035
2036
2037
2038
2039
2040
2041
2042
2043
2044
2045
2046
2047
2048
2049
2050
2051
2052
2053
2054
2055
2056
2057
2058
2059
2060
2061
2062
2063
2064
2065
2066
2067
2068
2069
2070
2071
2072
2073
2074
2075
2076
2077
2078
2079
2080
2081
2082
2083
2084
2085
2086
2087
2088
2089
2090
2091
2092
2093
2094
2095
2096
2097
2098
2099
2100
2101
2102
2103
2104
2105
2106
2107
2108
2109
2110
2111
2112
2113
2114
2115
2116
2117
2118
2119
2120
2121
2122
2123
2124
2125
2126
2127
2128
2129
2130
2131
2132
2133
2134
2135
2136
2137
2138
2139
2140
2141
2142
2143
2144
2145
2146
2147
2148
2149
2150
2151
2152
2153
2154
2155
2156
2157
2158
2159
2160
2161
2162
2163
2164
2165
2166
2167
2168
2169
2170
2171
2172
2173
2174
2175
2176
2177
2178
2179
2180
2181
2182
2183
2184
2185
2186
2187
2188
2189
2190
2191
2192
2193
2194
2195
2196
2197
2198
2199
2200
2201
2202
2203
2204
2205
2206
2207
2208
2209
2210
2211
2212
2213
2214
2215
2216
2217
2218
2219
2220
2221
2222
2223
2224
2225
2226
2227
2228
2229
2230
2231
2232
2233
2234
2235
2236
2237
2238
2239
2240
2241
2242
2243
2244
2245
2246
2247
2248
2249
2250
2251
2252
2253
2254
2255
2256
2257
2258
2259
2260
2261
2262
2263
2264
2265
2266
2267
2268
2269
2270
2271
2272
2273
2274
2275
2276
2277
2278
2279
2280
2281
2282
2283
2284
2285
2286
2287
2288
2289
2290
2291
2292
2293
2294
2295
2296
2297
2298
2299
2300
2301
2302
2303
2304
2305
2306
2307
2308
2309
2310
2311
2312
2313
2314
2315
2316
2317
2318
2319
2320
2321
2322
2323
2324
2325
2326
2327
2328
2329
2330
2331
2332
2333
2334
2335
2336
2337
2338
2339
2340
2341
2342
2343
2344
2345
2346
2347
2348
2349
2350
2351
2352
2353
2354
2355
2356
2357
2358
2359
2360
2361
2362
2363
2364
2365
2366
2367
2368
2369
2370
2371
2372
2373
2374
2375
2376
2377
2378
2379
2380
2381
2382
2383
2384
2385
2386
2387
2388
2389
2390
2391
2392
2393
2394
2395
2396
2397
2398
2399
2400
2401
2402
2403
2404
2405
2406
2407
2408
2409
2410
2411
2412
2413
2414
2415
2416
2417
2418
2419
2420
2421
2422
2423
2424
2425
2426
2427
2428
2429
2430
2431
2432
2433
2434
2435
2436
2437
2438
2439
2440
2441
2442
2443
2444
2445
2446
2447
2448
2449
2450
2451
2452
2453
2454
2455
2456
2457
2458
2459
2460
2461
2462
2463
2464
2465
2466
2467
2468
2469
2470
2471
2472
2473
2474
2475
2476
2477
2478
2479
2480
2481
2482
2483
2484
2485
2486
2487
2488
2489
2490
2491
2492
2493
2494
2495
2496
2497
2498
2499
2500
2501
2502
2503
2504
2505
2506
2507
2508
2509
2510
2511
2512
2513
2514
2515
2516
2517
2518
2519
2520
2521
2522
2523
2524
2525
2526
2527
2528
2529
2530
2531
2532
2533
2534
2535
2536
2537
2538
2539
2540
2541
2542
2543
2544
2545
2546
2547
2548
2549
2550
2551
2552
2553
2554
2555
2556
2557
2558
2559
2560
2561
2562
2563
2564
2565
2566
2567
2568
2569
2570
2571
2572
2573
2574
2575
2576
2577
2578
2579
2580
2581
2582
2583
2584
2585
2586
2587
2588
2589
2590
2591
2592
2593
2594
2595
2596
2597
2598
2599
2600
2601
2602
2603
2604
2605
2606
2607
2608
2609
2610
2611
2612
2613
2614
2615
2616
2617
2618
2619
2620
2621
2622
2623
2624
2625
2626
2627
2628
2629
2630
2631
2632
2633
2634
2635
2636
2637
2638
2639
2640
2641
2642
2643
2644
2645
2646
2647
2648
2649
2650
2651
2652
2653
2654
2655
2656
2657
2658
2659
2660
2661
2662
2663
2664
2665
2666
2667
2668
2669
2670
2671
2672
2673
2674
2675
2676
2677
2678
2679
2680
2681
2682
2683
2684
2685
2686
2687
2688
2689
2690
2691
2692
2693
2694
2695
2696
2697
2698
2699
2700
2701
2702
2703
2704
2705
2706
2707
2708
2709
2710
2711
2712
2713
2714
2715
2716
2717
2718
2719
2720
2721
2722
2723
2724
2725
2726
2727
2728
2729
2730
2731
2732
2733
2734
2735
2736
2737
2738
2739
2740
2741
2742
2743
2744
2745
2746
2747
2748
2749
2750
2751
2752
2753
2754
2755
2756
2757
2758
2759
2760
2761
2762
2763
2764
2765
2766
2767
2768
2769
2770
2771
2772
2773
2774
2775
2776
2777
2778
2779
2780
2781
2782
2783
2784
2785
2786
2787
2788
2789
2790
2791
2792
2793
2794
2795
2796
2797
2798
2799
2800
2801
2802
2803
2804
2805
2806
2807
2808
2809
2810
2811
2812
2813
2814
2815
2816
2817
2818
2819
2820
2821
2822
2823
2824
2825
2826
2827
2828
2829
2830
2831
2832
2833
2834
2835
2836
2837
2838
2839
2840
2841
2842
2843
2844
2845
2846
2847
2848
2849
2850
2851
2852
2853
2854
2855
2856
2857
2858
2859
2860
2861
2862
2863
2864
2865
2866
2867
2868
2869
2870
2871
2872
2873
2874
2875
2876
2877
2878
2879
2880
2881
2882
2883
2884
2885
2886
2887
2888
2889
2890
2891
2892
2893
2894
2895
2896
2897
2898
2899
2900
2901
2902
2903
2904
2905
2906
2907
2908
2909
2910
2911
2912
2913
2914
2915
2916
2917
2918
2919
2920
2921
2922
2923
2924
2925
2926
2927
2928
2929
2930
2931
2932
2933
2934
2935
2936
2937
2938
2939
2940
2941
2942
2943
2944
2945
2946
2947
2948
2949
2950
2951
2952
2953
2954
2955
2956
2957
2958
2959
2960
2961
2962
2963
2964
2965
2966
2967
2968
2969
2970
2971
2972
2973
2974
2975
2976
2977
2978
2979
2980
2981
2982
2983
2984
2985
2986
2987
2988
2989
2990
2991
2992
2993
2994
2995
2996
2997
2998
2999
3000
3001
3002
3003
3004
3005
3006
3007
3008
3009
3010
3011
3012
3013
3014
3015
3016
3017
3018
3019
3020
3021
3022
3023
3024
3025
3026
3027
3028
3029
3030
3031
3032
3033
3034
3035
3036
3037
3038
3039
3040
3041
3042
3043
3044
3045
3046
3047
3048
3049
3050
3051
3052
3053
3054
3055
3056
3057
3058
3059
3060
3061
3062
3063
3064
3065
3066
3067
3068
3069
3070
3071
3072
3073
3074
3075
3076
3077
3078
3079
3080
3081
3082
3083
3084
3085
3086
3087
3088
3089
3090
3091
3092
3093
3094
3095
3096
3097
3098
3099
3100
3101
3102
3103
3104
3105
3106
3107
3108
3109
3110
3111
3112
3113
3114
3115
3116
3117
3118
3119
3120
3121
3122
3123
3124
3125
3126
3127
3128
3129
3130
3131
3132
3133
3134
3135
3136
3137
3138
3139
3140
3141
3142
3143
3144
3145
3146
3147
3148
3149
3150
3151
3152
3153
3154
3155
3156
3157
3158
3159
3160
3161
3162
3163
3164
3165
3166
3167
3168
3169
3170
3171
3172
3173
3174
3175
3176
3177
3178
3179
3180
3181
3182
3183
3184
3185
3186
3187
3188
3189
3190
3191
3192
3193
3194
3195
3196
3197
3198
3199
3200
3201
3202
3203
3204
3205
3206
3207
3208
3209
3210
3211
3212
3213
3214
3215
3216
3217
3218
3219
3220
3221
3222
3223
3224
3225
3226
3227
3228
3229
3230
3231
3232
3233
3234
3235
3236
3237
3238
3239
3240
3241
3242
3243
3244
3245
3246
3247
3248
3249
3250
3251
3252
3253
3254
3255
3256
3257
3258
3259
3260
3261
3262
3263
3264
3265
3266
3267
3268
3269
3270
3271
3272
3273
3274
3275
3276
3277
3278
3279
3280
3281
3282
3283
3284
3285
3286
3287
3288
3289
3290
3291
3292
3293
3294
3295
3296
3297
3298
3299
3300
3301
3302
3303
3304
3305
3306
3307
3308
3309
3310
3311
3312
3313
3314
3315
3316
3317
3318
3319
3320
3321
3322
3323
3324
3325
3326
3327
3328
3329
3330
3331
3332
3333
3334
3335
3336
3337
3338
3339
3340
3341
3342
3343
3344
3345
3346
3347
3348
3349
3350
3351
3352
3353
3354
3355
3356
3357
3358
3359
3360
3361
3362
3363
3364
3365
3366
3367
3368
3369
3370
3371
3372
3373
3374
3375
3376
3377
3378
3379
3380
3381
3382
3383
3384
3385
3386
3387
3388
3389
3390
3391
3392
3393
3394
3395
3396
3397
3398
3399
3400
3401
3402
3403
3404
3405
3406
3407
3408
3409
3410
3411
3412
3413
3414
3415
3416
3417
3418
3419
3420
3421
3422
3423
3424
3425
3426
3427
3428
3429
3430
3431
3432
3433
3434
3435
3436
3437
3438
3439
3440
3441
3442
3443
3444
3445
3446
3447
3448
3449
3450
3451
3452
3453
3454
3455
3456
3457
3458
3459
3460
3461
3462
3463
3464
3465
3466
3467
3468
3469
3470
3471
3472
3473
3474
3475
3476
3477
3478
3479
3480
3481
3482
3483
3484
3485
3486
3487
3488
3489
3490
3491
3492
3493
3494
3495
3496
3497
3498
3499
3500
3501
3502
3503
3504
3505
3506
3507
3508
3509
3510
3511
3512
3513
3514
3515
3516
3517
3518
3519
3520
3521
3522
3523
3524
3525
3526
3527
3528
3529
3530
3531
3532
3533
3534
3535
3536
3537
3538
3539
3540
3541
3542
3543
3544
3545
3546
3547
3548
3549
3550
3551
3552
3553
3554
3555
3556
3557
3558
3559
3560
3561
3562
3563
3564
3565
3566
3567
3568
3569
3570
3571
3572
3573
3574
3575
3576
3577
3578
3579
3580
3581
3582
3583
3584
3585
3586
3587
3588
3589
3590
3591
3592
3593
3594
3595
3596
3597
3598
3599
3600
3601
3602
3603
3604
3605
3606
3607
3608
3609
3610
3611
3612
3613
3614
3615
3616
3617
3618
3619
3620
3621
3622
3623
3624
3625
3626
3627
3628
3629
3630
3631
3632
3633
3634
3635
3636
3637
3638
3639
3640
3641
3642
3643
3644
3645
3646
3647
3648
3649
3650
3651
3652
3653
3654
3655
3656
3657
3658
3659
3660
3661
3662
3663
3664
3665
3666
3667
3668
3669
3670
3671
3672
3673
3674
3675
3676
3677
3678
3679
3680
3681
3682
3683
3684
3685
3686
3687
3688
3689
3690
3691
3692
3693
3694
3695
3696
3697
3698
3699
3700
3701
3702
3703
3704
3705
3706
3707
3708
3709
3710
3711
3712
3713
3714
3715
3716
3717
3718
3719
3720
3721
3722
3723
3724
3725
3726
3727
3728
3729
3730
3731
3732
3733
3734
3735
3736
3737
3738
3739
3740
3741
3742
3743
3744
3745
3746
3747
3748
3749
3750
3751
3752
3753
3754
3755
3756
3757
3758
3759
3760
3761
3762
3763
3764
3765
3766
3767
3768
3769
3770
3771
3772
3773
3774
3775
3776
3777
3778
3779
3780
3781
3782
3783
3784
3785
3786
3787
3788
3789
3790
3791
3792
3793
3794
3795
3796
3797
3798
3799
3800
3801
3802
3803
3804
3805
3806
3807
3808
3809
3810
3811
3812
3813
3814
3815
3816
3817
3818
3819
3820
3821
3822
3823
3824
3825
3826
3827
3828
3829
3830
3831
3832
3833
3834
3835
3836
3837
3838
3839
3840
3841
3842
3843
3844
3845
3846
3847
3848
3849
3850
3851
3852
3853
3854
3855
3856
3857
3858
3859
3860
3861
3862
3863
3864
3865
3866
3867
3868
3869
3870
3871
3872
3873
3874
3875
3876
3877
3878
3879
3880
3881
3882
3883
3884
3885
3886
3887
3888
3889
3890
3891
3892
3893
3894
3895
3896
3897
3898
3899
3900
3901
3902
3903
3904
3905
3906
3907
3908
3909
3910
3911
3912
3913
3914
3915
3916
3917
3918
3919
3920
3921
3922
3923
3924
3925
3926
3927
3928
3929
3930
3931
3932
3933
3934
3935
3936
3937
3938
3939
3940
3941
3942
3943
3944
3945
3946
3947
3948
3949
3950
3951
3952
3953
3954
3955
3956
3957
3958
3959
3960
3961
3962
3963
3964
3965
3966
3967
3968
3969
3970
3971
3972
3973
3974
3975
3976
3977
3978
3979
3980
3981
3982
3983
3984
3985
3986
3987
3988
3989
3990
3991
3992
3993
3994
3995
3996
3997
3998
3999
4000
4001
4002
4003
4004
4005
4006
4007
4008
4009
4010
4011
4012
4013
4014
4015
4016
4017
4018
4019
4020
4021
4022
4023
4024
4025
4026
4027
4028
4029
4030
4031
4032
4033
4034
4035
4036
4037
4038
4039
4040
4041
4042
4043
4044
4045
4046
4047
4048
4049
4050
4051
4052
4053
4054
4055
4056
4057
4058
4059
4060
4061
4062
4063
4064
4065
4066
4067
4068
4069
4070
4071
4072
4073
4074
4075
4076
4077
4078
4079
4080
4081
4082
4083
4084
4085
4086
4087
4088
4089
4090
4091
4092
4093
4094
4095
4096
4097
4098
4099
4100
4101
4102
4103
4104
4105
4106
4107
4108
4109
4110
4111
4112
4113
4114
4115
4116
4117
4118
4119
4120
4121
4122
4123
4124
4125
4126
4127
4128
4129
4130
4131
4132
4133
4134
4135
4136
4137
4138
4139
4140
4141
4142
4143
4144
4145
4146
4147
4148
4149
4150
4151
4152
4153
4154
4155
4156
4157
4158
4159
4160
4161
4162
4163
/* esp.c:  EnhancedScsiProcessor Sun SCSI driver code.
 *
 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
 */

/* TODO:
 *
 * 1) Maybe disable parity checking in config register one for SCSI1
 *    targets.  (Gilmore says parity error on the SBus can lock up
 *    old sun4c's)
 * 2) Add support for DMA2 pipelining.
 * 3) Add tagged queueing.
 */

#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/types.h>
#include <linux/string.h>
#include <linux/malloc.h>
#include <linux/blk.h>
#include <linux/proc_fs.h>
#include <linux/stat.h>
#include <linux/init.h>

#include "scsi.h"
#include "hosts.h"
#include "esp.h"

#include <asm/sbus.h>
#include <asm/dma.h>
#include <asm/system.h>
#include <asm/machines.h>
#include <asm/ptrace.h>
#include <asm/pgtable.h>
#include <asm/oplib.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/idprom.h>
#include <asm/spinlock.h>

#define DEBUG_ESP
/* #define DEBUG_ESP_HME */
/* #define DEBUG_ESP_DATA */
/* #define DEBUG_ESP_QUEUE */
/* #define DEBUG_ESP_DISCONNECT */
/* #define DEBUG_ESP_STATUS */
/* #define DEBUG_ESP_PHASES */
/* #define DEBUG_ESP_WORKBUS */
/* #define DEBUG_STATE_MACHINE */
/* #define DEBUG_ESP_CMDS */
/* #define DEBUG_ESP_IRQS */
/* #define DEBUG_SDTR */
/* #define DEBUG_ESP_SG */

/* Use the following to sprinkle debugging messages in a way which
 * suits you if combinations of the above become too verbose when
 * trying to track down a specific problem.
 */
/* #define DEBUG_ESP_MISC */

#if defined(DEBUG_ESP)
#define ESPLOG(foo)  printk foo
#else
#define ESPLOG(foo)
#endif /* (DEBUG_ESP) */

#if defined(DEBUG_ESP_HME)
#define ESPHME(foo)  printk foo
#else
#define ESPHME(foo)
#endif

#if defined(DEBUG_ESP_DATA)
#define ESPDATA(foo)  printk foo
#else
#define ESPDATA(foo)
#endif

#if defined(DEBUG_ESP_QUEUE)
#define ESPQUEUE(foo)  printk foo
#else
#define ESPQUEUE(foo)
#endif

#if defined(DEBUG_ESP_DISCONNECT)
#define ESPDISC(foo)  printk foo
#else
#define ESPDISC(foo)
#endif

#if defined(DEBUG_ESP_STATUS)
#define ESPSTAT(foo)  printk foo
#else
#define ESPSTAT(foo)
#endif

#if defined(DEBUG_ESP_PHASES)
#define ESPPHASE(foo)  printk foo
#else
#define ESPPHASE(foo)
#endif

#if defined(DEBUG_ESP_WORKBUS)
#define ESPBUS(foo)  printk foo
#else
#define ESPBUS(foo)
#endif

#if defined(DEBUG_ESP_IRQS)
#define ESPIRQ(foo)  printk foo
#else
#define ESPIRQ(foo)
#endif

#if defined(DEBUG_SDTR)
#define ESPSDTR(foo)  printk foo
#else
#define ESPSDTR(foo)
#endif

#if defined(DEBUG_ESP_MISC)
#define ESPMISC(foo)  printk foo
#else
#define ESPMISC(foo)
#endif

/* Command phase enumeration. */
enum {
	not_issued    = 0x00,  /* Still in the issue_SC queue.          */

	/* Various forms of selecting a target. */
#define in_slct_mask    0x10
	in_slct_norm  = 0x10,  /* ESP is arbitrating, normal selection  */
	in_slct_stop  = 0x11,  /* ESP will select, then stop with IRQ   */
	in_slct_msg   = 0x12,  /* select, then send a message           */
	in_slct_tag   = 0x13,  /* select and send tagged queue msg      */
	in_slct_sneg  = 0x14,  /* select and acquire sync capabilities  */

	/* Any post selection activity. */
#define in_phases_mask  0x20
	in_datain     = 0x20,  /* Data is transferring from the bus     */
	in_dataout    = 0x21,  /* Data is transferring to the bus       */
	in_data_done  = 0x22,  /* Last DMA data operation done (maybe)  */
	in_msgin      = 0x23,  /* Eating message from target            */
	in_msgincont  = 0x24,  /* Eating more msg bytes from target     */
	in_msgindone  = 0x25,  /* Decide what to do with what we got    */
	in_msgout     = 0x26,  /* Sending message to target             */
	in_msgoutdone = 0x27,  /* Done sending msg out                  */
	in_cmdbegin   = 0x28,  /* Sending cmd after abnormal selection  */
	in_cmdend     = 0x29,  /* Done sending slow cmd                 */
	in_status     = 0x2a,  /* Was in status phase, finishing cmd    */
	in_freeing    = 0x2b,  /* freeing the bus for cmd cmplt or disc */
	in_the_dark   = 0x2c,  /* Don't know what bus phase we are in   */

	/* Special states, ie. not normal bus transitions... */
#define in_spec_mask    0x80
	in_abortone   = 0x80,  /* Aborting one command currently        */
	in_abortall   = 0x81,  /* Blowing away all commands we have     */
	in_resetdev   = 0x82,  /* SCSI target reset in progress         */
	in_resetbus   = 0x83,  /* SCSI bus reset in progress            */
	in_tgterror   = 0x84,  /* Target did something stupid           */
};

struct proc_dir_entry proc_scsi_esp = {
	PROC_SCSI_ESP, 3, "esp",
	S_IFDIR | S_IRUGO | S_IXUGO, 2
};

/* The master ring of all esp hosts we are managing in this driver. */
static struct Sparc_ESP *espchain;
static int esps_running = 0;

/* Forward declarations. */
static void esp_intr(int irq, void *dev_id, struct pt_regs *pregs);
#ifndef __sparc_v9__
static void esp_intr_4d(int irq, void *dev_id, struct pt_regs *pregs);
#endif

/* Debugging routines */
struct esp_cmdstrings {
	unchar cmdchar;
	char *text;
} esp_cmd_strings[] = {
	/* Miscellaneous */
	{ ESP_CMD_NULL, "ESP_NOP", },
	{ ESP_CMD_FLUSH, "FIFO_FLUSH", },
	{ ESP_CMD_RC, "RSTESP", },
	{ ESP_CMD_RS, "RSTSCSI", },
	/* Disconnected State Group */
	{ ESP_CMD_RSEL, "RESLCTSEQ", },
	{ ESP_CMD_SEL, "SLCTNATN", },
	{ ESP_CMD_SELA, "SLCTATN", },
	{ ESP_CMD_SELAS, "SLCTATNSTOP", },
	{ ESP_CMD_ESEL, "ENSLCTRESEL", },
	{ ESP_CMD_DSEL, "DISSELRESEL", },
	{ ESP_CMD_SA3, "SLCTATN3", },
	{ ESP_CMD_RSEL3, "RESLCTSEQ", },
	/* Target State Group */
	{ ESP_CMD_SMSG, "SNDMSG", },
	{ ESP_CMD_SSTAT, "SNDSTATUS", },
	{ ESP_CMD_SDATA, "SNDDATA", },
	{ ESP_CMD_DSEQ, "DISCSEQ", },
	{ ESP_CMD_TSEQ, "TERMSEQ", },
	{ ESP_CMD_TCCSEQ, "TRGTCMDCOMPSEQ", },
	{ ESP_CMD_DCNCT, "DISC", },
	{ ESP_CMD_RMSG, "RCVMSG", },
	{ ESP_CMD_RCMD, "RCVCMD", },
	{ ESP_CMD_RDATA, "RCVDATA", },
	{ ESP_CMD_RCSEQ, "RCVCMDSEQ", },
	/* Initiator State Group */
	{ ESP_CMD_TI, "TRANSINFO", },
	{ ESP_CMD_ICCSEQ, "INICMDSEQCOMP", },
	{ ESP_CMD_MOK, "MSGACCEPTED", },
	{ ESP_CMD_TPAD, "TPAD", },
	{ ESP_CMD_SATN, "SATN", },
	{ ESP_CMD_RATN, "RATN", },
};
#define NUM_ESP_COMMANDS  ((sizeof(esp_cmd_strings)) / (sizeof(struct esp_cmdstrings)))

/* Print textual representation of an ESP command */
static inline void esp_print_cmd(unchar espcmd)
{
	unchar dma_bit = espcmd & ESP_CMD_DMA;
	int i;

	espcmd &= ~dma_bit;
	for(i=0; i<NUM_ESP_COMMANDS; i++)
		if(esp_cmd_strings[i].cmdchar == espcmd)
			break;
	if(i==NUM_ESP_COMMANDS)
		printk("ESP_Unknown");
	else
		printk("%s%s", esp_cmd_strings[i].text,
		       ((dma_bit) ? "+DMA" : ""));
}

/* Print the status register's value */
static inline void esp_print_statreg(unchar statreg)
{
	unchar phase;

	printk("STATUS<");
	phase = statreg & ESP_STAT_PMASK;
	printk("%s,", (phase == ESP_DOP ? "DATA-OUT" :
		       (phase == ESP_DIP ? "DATA-IN" :
			(phase == ESP_CMDP ? "COMMAND" :
			 (phase == ESP_STATP ? "STATUS" :
			  (phase == ESP_MOP ? "MSG-OUT" :
			   (phase == ESP_MIP ? "MSG_IN" :
			    "unknown")))))));
	if(statreg & ESP_STAT_TDONE)
		printk("TRANS_DONE,");
	if(statreg & ESP_STAT_TCNT)
		printk("TCOUNT_ZERO,");
	if(statreg & ESP_STAT_PERR)
		printk("P_ERROR,");
	if(statreg & ESP_STAT_SPAM)
		printk("SPAM,");
	if(statreg & ESP_STAT_INTR)
		printk("IRQ,");
	printk(">");
}

/* Print the interrupt register's value */
static inline void esp_print_ireg(unchar intreg)
{
	printk("INTREG< ");
	if(intreg & ESP_INTR_S)
		printk("SLCT_NATN ");
	if(intreg & ESP_INTR_SATN)
		printk("SLCT_ATN ");
	if(intreg & ESP_INTR_RSEL)
		printk("RSLCT ");
	if(intreg & ESP_INTR_FDONE)
		printk("FDONE ");
	if(intreg & ESP_INTR_BSERV)
		printk("BSERV ");
	if(intreg & ESP_INTR_DC)
		printk("DISCNCT ");
	if(intreg & ESP_INTR_IC)
		printk("ILL_CMD ");
	if(intreg & ESP_INTR_SR)
		printk("SCSI_BUS_RESET ");
	printk(">");
}

/* Print the sequence step registers contents */
static inline void esp_print_seqreg(unchar stepreg)
{
	stepreg &= ESP_STEP_VBITS;
	printk("STEP<%s>",
	       (stepreg == ESP_STEP_ASEL ? "SLCT_ARB_CMPLT" :
		(stepreg == ESP_STEP_SID ? "1BYTE_MSG_SENT" :
		 (stepreg == ESP_STEP_NCMD ? "NOT_IN_CMD_PHASE" :
		  (stepreg == ESP_STEP_PPC ? "CMD_BYTES_LOST" :
		   (stepreg == ESP_STEP_FINI4 ? "CMD_SENT_OK" :
		    "UNKNOWN"))))));
}

static char *phase_string(int phase)
{
	switch(phase) {
	case not_issued:
		return "UNISSUED";
	case in_slct_norm:
		return "SLCTNORM";
	case in_slct_stop:
		return "SLCTSTOP";
	case in_slct_msg:
		return "SLCTMSG";
	case in_slct_tag:
		return "SLCTTAG";
	case in_slct_sneg:
		return "SLCTSNEG";
	case in_datain:
		return "DATAIN";
	case in_dataout:
		return "DATAOUT";
	case in_data_done:
		return "DATADONE";
	case in_msgin:
		return "MSGIN";
	case in_msgincont:
		return "MSGINCONT";
	case in_msgindone:
		return "MSGINDONE";
	case in_msgout:
		return "MSGOUT";
	case in_msgoutdone:
		return "MSGOUTDONE";
	case in_cmdbegin:
		return "CMDBEGIN";
	case in_cmdend:
		return "CMDEND";
	case in_status:
		return "STATUS";
	case in_freeing:
		return "FREEING";
	case in_the_dark:
		return "CLUELESS";
	case in_abortone:
		return "ABORTONE";
	case in_abortall:
		return "ABORTALL";
	case in_resetdev:
		return "RESETDEV";
	case in_resetbus:
		return "RESETBUS";
	case in_tgterror:
		return "TGTERROR";
	default:
		return "UNKNOWN";
	};
}

static inline void esp_advance_phase(Scsi_Cmnd *s, int newphase)
{
#ifdef DEBUG_STATE_MACHINE
	ESPLOG(("<%s>", phase_string(newphase)));
#endif
	s->SCp.sent_command = s->SCp.phase;
	s->SCp.phase = newphase;
}

extern inline void esp_cmd(struct Sparc_ESP *esp, struct Sparc_ESP_regs *eregs,
			   unchar cmd)
{
#ifdef DEBUG_ESP_CMDS
	esp->espcmdlog[esp->espcmdent] = cmd;
	esp->espcmdent = (esp->espcmdent + 1) & 31;
#endif
	eregs->esp_cmd = cmd;
}

/* How we use the various Linux SCSI data structures for operation.
 *
 * struct scsi_cmnd:
 *
 *   We keep track of the syncronous capabilities of a target
 *   in the device member, using sync_min_period and
 *   sync_max_offset.  These are the values we directly write
 *   into the ESP registers while running a command.  If offset
 *   is zero the ESP will use asynchronous transfers.
 *   If the borken flag is set we assume we shouldn't even bother
 *   trying to negotiate for synchronous transfer as this target
 *   is really stupid.  If we notice the target is dropping the
 *   bus, and we have been allowing it to disconnect, we clear
 *   the disconnect flag.
 */


/* Manipulation of the ESP command queues.  Thanks to the aha152x driver
 * and its author, Juergen E. Fischer, for the methods used here.
 * Note that these are per-ESP queues, not global queues like
 * the aha152x driver uses.
 */
static inline void append_SC(Scsi_Cmnd **SC, Scsi_Cmnd *new_SC)
{
	Scsi_Cmnd *end;

	new_SC->host_scribble = (unsigned char *) NULL;
	if(!*SC)
		*SC = new_SC;
	else {
		for(end=*SC;end->host_scribble;end=(Scsi_Cmnd *)end->host_scribble)
			;
		end->host_scribble = (unsigned char *) new_SC;
	}
}

static inline void prepend_SC(Scsi_Cmnd **SC, Scsi_Cmnd *new_SC)
{
	new_SC->host_scribble = (unsigned char *) *SC;
	*SC = new_SC;
}

static inline Scsi_Cmnd *remove_first_SC(Scsi_Cmnd **SC)
{
	Scsi_Cmnd *ptr;
	ptr = *SC;
	if(ptr)
		*SC = (Scsi_Cmnd *) (*SC)->host_scribble;
	return ptr;
}

static inline Scsi_Cmnd *remove_SC(Scsi_Cmnd **SC, int target, int lun)
{
	Scsi_Cmnd *ptr, *prev;

	for(ptr = *SC, prev = NULL;
	    ptr && ((ptr->target != target) || (ptr->lun != lun));
	    prev = ptr, ptr = (Scsi_Cmnd *) ptr->host_scribble)
		;
	if(ptr) {
		if(prev)
			prev->host_scribble=ptr->host_scribble;
		else
			*SC=(Scsi_Cmnd *)ptr->host_scribble;
	}
	return ptr;
}

/* Resetting various pieces of the ESP scsi driver chipset/buses. */
static inline void esp_reset_dma(struct Sparc_ESP *esp)
{
	struct sparc_dma_registers *dregs = esp->dregs;
	unsigned long tmp, flags;
	int can_do_burst16, can_do_burst32;

	can_do_burst16 = esp->bursts & DMA_BURST16;
	can_do_burst32 = esp->bursts & DMA_BURST32;

	/* Punt the DVMA into a known state. */
	if(esp->dma->revision != dvmahme) {
		dregs->cond_reg |= DMA_RST_SCSI;
		dregs->cond_reg &= ~(DMA_RST_SCSI);
	}
	switch(esp->dma->revision) {
	case dvmahme:
		/* This is the HME DVMA gate array. */

		save_flags(flags); cli(); /* I really hate this chip. */

		dregs->cond_reg = 0x08000000;   /* Reset interface to FAS */
		dregs->cond_reg = DMA_RST_SCSI; /* Reset DVMA itself */

		tmp = (DMA_PARITY_OFF|DMA_2CLKS|DMA_SCSI_DISAB|DMA_INT_ENAB);
		tmp &= ~(DMA_ENABLE|DMA_ST_WRITE|DMA_BRST_SZ);

		if(can_do_burst32)
			tmp |= DMA_BRST32;

		/* This chip is horrible. */
		while(dregs->cond_reg & DMA_PEND_READ)
			udelay(1);

		dregs->cond_reg = 0;

		dregs->cond_reg = tmp;        /* bite me */
		restore_flags(flags);         /* ugh...  */
		break;
	case dvmarev2:
		/* This is the gate array found in the sun4m
		 * NCR SBUS I/O subsystem.
		 */
		if(esp->erev != esp100)
			dregs->cond_reg |= DMA_3CLKS;
		break;
	case dvmarev3:
		dregs->cond_reg &= ~(DMA_3CLKS);
		dregs->cond_reg |= DMA_2CLKS;
		if(can_do_burst32) {
			dregs->cond_reg &= ~(DMA_BRST_SZ);
			dregs->cond_reg |= DMA_BRST32;
		}
		break;
	case dvmaesc1:
		/* This is the DMA unit found on SCSI/Ether cards. */
		dregs->cond_reg |= DMA_ADD_ENABLE;
		dregs->cond_reg &= ~DMA_BCNT_ENAB;
		if(!can_do_burst32 && can_do_burst16) {
			dregs->cond_reg |= DMA_ESC_BURST;
		} else {
			dregs->cond_reg &= ~(DMA_ESC_BURST);
		}
		break;
	default:
		break;
	};
	DMA_INTSON(dregs);
}

/* Reset the ESP chip, _not_ the SCSI bus. */
static inline void esp_reset_esp(struct Sparc_ESP *esp, struct Sparc_ESP_regs *eregs)
{
	int family_code, version, i;
	volatile int trash;

	/* Now reset the ESP chip */
	esp_cmd(esp, eregs, ESP_CMD_RC);
	esp_cmd(esp, eregs, ESP_CMD_NULL | ESP_CMD_DMA);
	esp_cmd(esp, eregs, ESP_CMD_NULL | ESP_CMD_DMA);

	/* Reload the configuration registers */
	eregs->esp_cfact = esp->cfact;
	eregs->esp_stp   = 0;
	eregs->esp_soff  = 0;
	eregs->esp_timeo = esp->neg_defp;

	/* This is the only point at which it is reliable to read
	 * the ID-code for a fast ESP chip variants.
	 */
	esp->max_period = ((35 * esp->ccycle) / 1000);
	if(esp->erev == fast) {
		version = eregs->esp_uid;
		family_code = (version & 0xf8) >> 3;
		if(family_code == 0x02)
			esp->erev = fas236;
		else if(family_code == 0x0a)
			esp->erev = fashme; /* Version is usually '5'. */
		else
			esp->erev = fas100a;
		printk("esp%d: FAST chip is %s (family=%d, version=%d)\n",
		       esp->esp_id,
		       (esp->erev == fas236) ? "fas236" :
		       ((esp->erev == fas100a) ? "fas100a" :
		       "fasHME"), family_code, (version & 7));

		esp->min_period = ((4 * esp->ccycle) / 1000);
	} else {
		esp->min_period = ((5 * esp->ccycle) / 1000);
	}
	esp->max_period = (esp->max_period + 3)>>2;
	esp->min_period = (esp->min_period + 3)>>2;

	eregs->esp_cfg1  = esp->config1;
	switch(esp->erev) {
	case esp100:
		/* nothing to do */
		break;
	case esp100a:
		eregs->esp_cfg2 = esp->config2;
		break;
	case esp236:
		/* Slow 236 */
		eregs->esp_cfg2 = esp->config2;
		eregs->esp_cfg3 = esp->config3[0];
		break;
	case fashme:
		esp->config2 |= (ESP_CONFIG2_HME32 | ESP_CONFIG2_HMEFENAB);
		/* fallthrough... */
	case fas236:
		/* Fast 236 or HME */
		eregs->esp_cfg2 = esp->config2;
		for(i=0; i<8; i++) {
			if(esp->erev == fashme)
				esp->config3[i] |=
					(ESP_CONFIG3_FCLOCK | ESP_CONFIG3_BIGID | ESP_CONFIG3_OBPUSH);
			else
				esp->config3[i] |= ESP_CONFIG3_FCLK;
		}
		eregs->esp_cfg3 = esp->config3[0];
		if(esp->erev == fashme) {
			esp->radelay = 80;
		} else {
			if(esp->diff)
				esp->radelay = 0;
			else
				esp->radelay = 96;
		}
		break;
	case fas100a:
		/* Fast 100a */
		eregs->esp_cfg2 = esp->config2;
		for(i=0; i<8; i++)
			esp->config3[i] |= ESP_CONFIG3_FCLOCK;
		eregs->esp_cfg3 = esp->config3[0];
		esp->radelay = 32;
		break;
	default:
		panic("esp: what could it be... I wonder...");
		break;
	};

	/* Eat any bitrot in the chip */
	trash = eregs->esp_intrpt;
	udelay(100);
}

/* This places the ESP into a known state at boot time. */
static inline void esp_bootup_reset(struct Sparc_ESP *esp, struct Sparc_ESP_regs *eregs)
{
	volatile unchar trash;

	/* Reset the DMA */
	esp_reset_dma(esp);

	/* Reset the ESP */
	esp_reset_esp(esp, eregs);

	/* Reset the SCSI bus, but tell ESP not to generate an irq */
	eregs->esp_cfg1 |= ESP_CONFIG1_SRRDISAB;
	esp_cmd(esp, eregs, ESP_CMD_RS);
	udelay(400);
	eregs->esp_cfg1 = esp->config1;

	/* Eat any bitrot in the chip and we are done... */
	trash = eregs->esp_intrpt;
}

__initfunc(int detect_one_esp
(Scsi_Host_Template *tpnt, struct linux_sbus_device *esp_dev, struct linux_sbus_device *espdma,
 struct linux_sbus *sbus, int id, int hme))
{
	struct Sparc_ESP *esp, *elink;
	struct Scsi_Host *esp_host;
	struct Sparc_ESP_regs *eregs;
	struct sparc_dma_registers *dregs;
	struct Linux_SBus_DMA *dma, *dlink;
	unsigned int fmhz;
	unchar ccf, bsizes, bsizes_more;
	int esp_node, i;
	
	esp_host = scsi_register(tpnt, sizeof(struct Sparc_ESP));
	if(!esp_host)
		panic("Cannot register ESP SCSI host");
	if(hme)
		esp_host->max_id = 16;
	esp = (struct Sparc_ESP *) esp_host->hostdata;
	if(!esp)
		panic("No esp in hostdata");
	esp->ehost = esp_host;
	esp->edev = esp_dev;
	esp->esp_id = id;

	/* Put into the chain of esp chips detected */
	if(espchain) {
		elink = espchain;
		while(elink->next) elink = elink->next;
		elink->next = esp;
	} else {
		espchain = esp;
	}
	esp->next = 0;

	/* Get misc. prom information */
#define ESP_IS_MY_DVMA(esp, dma)  \
	(!dma->SBus_dev || \
	 ((esp->edev->my_bus == dma->SBus_dev->my_bus) && \
          (esp->edev->slot == dma->SBus_dev->slot) && \
	  (!strcmp(dma->SBus_dev->prom_name, "dma") || \
	   !strcmp(dma->SBus_dev->prom_name, "espdma"))))

	esp_node = esp_dev->prom_node;
	prom_getstring(esp_node, "name", esp->prom_name,
		       sizeof(esp->prom_name));
	esp->prom_node = esp_node;
	if(espdma) {
		for_each_dvma(dlink) {
			if(dlink->SBus_dev == espdma)
				break;
		}
	} else {
		for_each_dvma(dlink) {
			if(ESP_IS_MY_DVMA(esp, dlink) &&
			   !dlink->allocated)
				break;
		}
	}
#undef ESP_IS_MY_DVMA
	/* If we don't know how to handle the dvma,
	 * do not use this device.
	 */
	if(!dlink){
		printk ("Cannot find dvma for ESP%d's SCSI\n",
			esp->esp_id);
		scsi_unregister (esp_host);
		return -1;
	}
	if (dlink->allocated){
		printk ("esp%d: can't use my espdma\n",
			esp->esp_id);
		scsi_unregister (esp_host);
		return -1;
	}
	dlink->allocated = 1;
	dma = dlink;
	esp->dma = dma;
	esp->dregs = dregs = dma->regs;

	/* Map in the ESP registers from I/O space */
	if(!hme) {
		prom_apply_sbus_ranges(esp->edev->my_bus, 
				       esp->edev->reg_addrs,
				       1, esp->edev);

		esp->eregs = eregs = (struct Sparc_ESP_regs *)
		sparc_alloc_io(esp->edev->reg_addrs[0].phys_addr, 0,
			       PAGE_SIZE, "ESP Registers",
			       esp->edev->reg_addrs[0].which_io, 0x0);
	} else {
		/* On HME, two reg sets exist, first is DVMA,
		 * second is ESP registers.
		 */
		esp->eregs = eregs = (struct Sparc_ESP_regs *)
		sparc_alloc_io(esp->edev->reg_addrs[1].phys_addr, 0,
			       PAGE_SIZE, "ESP Registers",
			       esp->edev->reg_addrs[1].which_io, 0x0);
	}
	if(!eregs)
		panic("ESP registers unmappable");
	esp->esp_command =
		sparc_dvma_malloc(16, "ESP DVMA Cmd Block",
				  &esp->esp_command_dvma);
	if(!esp->esp_command || !esp->esp_command_dvma)
		panic("ESP DVMA transport area unmappable");

	/* Set up the irq's etc. */
	esp->ehost->base = (unsigned char *) esp->eregs;
	esp->ehost->io_port =
		esp->edev->reg_addrs[0].phys_addr;
	esp->ehost->n_io_port = (unsigned char)
		esp->edev->reg_addrs[0].reg_size;
	esp->ehost->irq = esp->irq = esp->edev->irqs[0];

#ifndef __sparc_v9__
	if (sparc_cpu_model != sun4d) {
		/* Allocate the irq only if necessary */
		for_each_esp(elink) {
			if((elink != esp) && (esp->irq == elink->irq)) {
				goto esp_irq_acquired; /* BASIC rulez */
			}
		}
		if(request_irq(esp->ehost->irq, esp_intr, SA_SHIRQ,
			       "Sparc ESP SCSI", NULL))
			panic("Cannot acquire ESP irq line");
esp_irq_acquired:
		printk("esp%d: IRQ %d ", esp->esp_id, esp->ehost->irq);
	} else {
		if (request_irq(esp->ehost->irq, esp_intr_4d,
			SA_SHIRQ, "Sparc ESP SCSI", esp))
			panic("Cannot acquire ESP irq line");
		printk("esp%d: IRQ %s ", esp->esp_id, __irq_itoa(esp->ehost->irq));
	}
#else
	/* On Ultra we must always call request_irq for each
	 * esp, so that imap registers get setup etc.
	 */
	if(request_irq(esp->ehost->irq, esp_intr,
		       SA_SHIRQ, "Sparc ESP SCSI", esp))
		panic("Cannot acquire ESP irq line");
	printk("esp%d: IRQ %s ",
	       esp->esp_id, __irq_itoa(esp->ehost->irq));
#endif

	/* Figure out our scsi ID on the bus */
	esp->scsi_id = prom_getintdefault(esp->prom_node,
					  "initiator-id",
					  -1);
	if(esp->scsi_id == -1)
		esp->scsi_id = prom_getintdefault(esp->prom_node,
						  "scsi-initiator-id",
						  -1);
	if(esp->scsi_id == -1)
		esp->scsi_id = (!esp->edev->my_bus) ? 7 :
			prom_getintdefault(esp->edev->my_bus->prom_node,
					   "scsi-initiator-id",
					   7);
	esp->ehost->this_id = esp->scsi_id;
	esp->scsi_id_mask = (1 << esp->scsi_id);

	/* Check for differential SCSI-bus */
	esp->diff = prom_getbool(esp->prom_node, "differential");
	if(esp->diff)
		printk("Differential ");

	/* Check out the clock properties of the chip. */

	/* This is getting messy but it has to be done
	 * correctly or else you get weird behavior all
	 * over the place.  We are trying to basically
	 * figure out three pieces of information.
	 *
	 * a) Clock Conversion Factor
	 *
	 *    This is a representation of the input
	 *    crystal clock frequency going into the
	 *    ESP on this machine.  Any operation whose
	 *    timing is longer than 400ns depends on this
	 *    value being correct.  For example, you'll
	 *    get blips for arbitration/selection during
	 *    high load or with multiple targets if this
	 *    is not set correctly.
	 *
	 * b) Selection Time-Out
	 *
	 *    The ESP isn't very bright and will arbitrate
	 *    for the bus and try to select a target
	 *    forever if you let it.  This value tells
	 *    the ESP when it has taken too long to
	 *    negotiate and that it should interrupt
	 *    the CPU so we can see what happened.
	 *    The value is computed as follows (from
	 *    NCR/Symbios chip docs).
	 *
	 *          (Time Out Period) *  (Input Clock)
	 *    STO = ----------------------------------
	 *          (8192) * (Clock Conversion Factor)
	 *
	 *    You usually want the time out period to be
	 *    around 250ms, I think we'll set it a little
	 *    bit higher to account for fully loaded SCSI
	 *    bus's and slow devices that don't respond so
	 *    quickly to selection attempts. (yeah, I know
	 *    this is out of spec. but there is a lot of
	 *    buggy pieces of firmware out there so bite me)
	 *
	 * c) Imperical constants for synchronous offset
	 *    and transfer period register values
	 *
	 *    This entails the smallest and largest sync
	 *    period we could ever handle on this ESP.
	 */

	fmhz = prom_getintdefault(esp->prom_node,
				  "clock-frequency",
				  -1);
	if(fmhz==-1)
		fmhz = (!esp->edev->my_bus) ? 0 :
			prom_getintdefault(esp->edev->my_bus->prom_node,
					   "clock-frequency",
					   -1);
	if(fmhz <= (5000000))
		ccf = 0;
	else
		ccf = (((5000000 - 1) + (fmhz))/(5000000));
	if(!ccf || ccf > 8) {
		/* If we can't find anything reasonable,
		 * just assume 20MHZ.  This is the clock
		 * frequency of the older sun4c's where I've
		 * been unable to find the clock-frequency
		 * PROM property.  All other machines provide
		 * useful values it seems.
		 */
		ccf = ESP_CCF_F4;
		fmhz = (20000000);
	}
	if(ccf==(ESP_CCF_F7+1))
		esp->cfact = ESP_CCF_F0;
	else if(ccf == ESP_CCF_NEVER)
		esp->cfact = ESP_CCF_F2;
	else
		esp->cfact = ccf;
	esp->cfreq = fmhz;
	esp->ccycle = ESP_MHZ_TO_CYCLE(fmhz);
	esp->ctick = ESP_TICK(ccf, esp->ccycle);
	esp->neg_defp = ESP_NEG_DEFP(fmhz, ccf);
	esp->sync_defp = SYNC_DEFP_SLOW;
	printk("SCSI ID %d  Clock %d MHz CCF=%d Time-Out %d ",
	       esp->scsi_id, (fmhz / 1000000),
	       ccf, (int) esp->neg_defp);

	/* Find the burst sizes this dma/sbus/esp supports. */
	bsizes = prom_getintdefault(esp->prom_node, "burst-sizes", 0xff);
	bsizes &= 0xff;
	if(espdma) {
		bsizes_more = prom_getintdefault(
				  espdma->prom_node,
				  "burst-sizes", 0xff);
		if(bsizes_more != 0xff)
			bsizes &= bsizes_more;
	}
	if (esp->edev->my_bus) {
		bsizes_more = prom_getintdefault(esp->edev->my_bus->prom_node,
						 "burst-sizes", 0xff);
		if(bsizes_more != 0xff)
			bsizes &= bsizes_more;
	}

	if(bsizes == 0xff || (bsizes & DMA_BURST16)==0 ||
	   (bsizes & DMA_BURST32)==0)
		bsizes = (DMA_BURST32 - 1);

	esp->bursts = bsizes;

	/* Probe the revision of this esp */
	esp->config1 = (ESP_CONFIG1_PENABLE | (esp->scsi_id & 7));
	esp->config2 = (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY);
	eregs->esp_cfg2 = esp->config2;
	if((eregs->esp_cfg2 & ~(ESP_CONFIG2_MAGIC)) !=
	   (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY)) {
		printk("NCR53C90(esp100) detected\n");
		esp->erev = esp100;
	} else {
		eregs->esp_cfg2 = esp->config2 = 0;
		eregs->esp_cfg3 = 0;
		eregs->esp_cfg3 = esp->config3[0] = 5;
		if(eregs->esp_cfg3 != 5) {
			printk("NCR53C90A(esp100a) detected\n");
			esp->erev = esp100a;
		} else {
			int target;

			for(target=0; target<8; target++)
				esp->config3[target] = 0;
			eregs->esp_cfg3 = 0;
			if(ccf > ESP_CCF_F5) {
				printk("NCR53C9XF(espfast) detected\n");
				esp->erev = fast;
				eregs->esp_cfg2 = esp->config2 = 0;
				esp->sync_defp = SYNC_DEFP_FAST;
			} else {
				printk("NCR53C9x(esp236) detected\n");
				esp->erev = esp236;
				eregs->esp_cfg2 = esp->config2 = 0;
			}
		}
	}				

	/* Initialize the command queues */
	esp->current_SC = 0;
	esp->disconnected_SC = 0;
	esp->issue_SC = 0;

	/* Clear the state machines. */
	esp->targets_present = 0;
	esp->resetting_bus = 0;
	esp->snip = 0;
	esp->targets_present = 0;
	for(i = 0; i < 32; i++)
		esp->espcmdlog[i] = 0;
	esp->espcmdent = 0;
	for(i = 0; i < 16; i++) {
		esp->cur_msgout[i] = 0;
		esp->cur_msgin[i] = 0;
	}
	esp->prevmsgout = esp->prevmsgin = 0;
	esp->msgout_len = esp->msgin_len = 0;

	/* Reset the thing before we try anything... */
	esp_bootup_reset(esp, eregs);

	return 0;
}

/* Detecting ESP chips on the machine.  This is the simple and easy
 * version.
 */

#ifdef CONFIG_SUN4

#include <asm/sun4paddr.h>

__initfunc(int esp_detect(Scsi_Host_Template *tpnt))
{
	static struct linux_sbus_device esp_dev;
	int esps_in_use = 0;

	espchain = 0;

	if(sun4_esp_physaddr) {
		memset (&esp_dev, 0, sizeof(esp_dev));
		esp_dev.reg_addrs[0].phys_addr = sun4_esp_physaddr;
		esp_dev.irqs[0] = 4;

		if (!detect_one_esp(tpnt, &esp_dev, NULL, NULL, 0, 0))
			esps_in_use++;
		printk("ESP: Total of 1 ESP hosts found, %d actually in use.\n", esps_in_use);
		esps_running = esps_in_use;
	}
	return esps_in_use;
}

#else /* !CONFIG_SUN4 */

__initfunc(int esp_detect(Scsi_Host_Template *tpnt))
{
	struct linux_sbus *sbus;
	struct linux_sbus_device *esp_dev, *sbdev_iter;
	int nesps = 0, esps_in_use = 0;

	espchain = 0;
	if(!SBus_chain) {
#ifdef CONFIG_PCI
		return 0;
#else
		panic("No SBUS in esp_detect()");
#endif
	}
	for_each_sbus(sbus) {
		for_each_sbusdev(sbdev_iter, sbus) {
			struct linux_sbus_device *espdma = 0;
			int hme = 0;

			/* Is it an esp sbus device? */
			esp_dev = sbdev_iter;
			if(strcmp(esp_dev->prom_name, "esp") &&
			   strcmp(esp_dev->prom_name, "SUNW,esp")) {
				if(!strcmp(esp_dev->prom_name, "SUNW,fas")) {
					hme = 1;
					espdma = esp_dev;
				} else {
					if(!esp_dev->child ||
					   (strcmp(esp_dev->prom_name, "espdma") &&
					    strcmp(esp_dev->prom_name, "dma")))
						continue; /* nope... */
					espdma = esp_dev;
					esp_dev = esp_dev->child;
					if(strcmp(esp_dev->prom_name, "esp") &&
					   strcmp(esp_dev->prom_name, "SUNW,esp"))
						continue; /* how can this happen? */
				}
			}
			
			if (detect_one_esp(tpnt, esp_dev, espdma, sbus, nesps++, hme) < 0)
				continue;
				
			esps_in_use++;
		} /* for each sbusdev */
	} /* for each sbus */
	printk("ESP: Total of %d ESP hosts found, %d actually in use.\n", nesps,
	       esps_in_use);
	esps_running = esps_in_use;
	return esps_in_use;
}

#endif /* !CONFIG_SUN4 */

/* The info function will return whatever useful
 * information the developer sees fit.  If not provided, then
 * the name field will be used instead.
 */
const char *esp_info(struct Scsi_Host *host)
{
	struct Sparc_ESP *esp;

	esp = (struct Sparc_ESP *) host->hostdata;
	switch(esp->erev) {
	case esp100:
		return "Sparc ESP100 (NCR53C90)";
	case esp100a:
		return "Sparc ESP100A (NCR53C90A)";
	case esp236:
		return "Sparc ESP236";
	case fas236:
		return "Sparc ESP236-FAST";
	case fashme:
		return "Sparc ESP366-HME";
	case fas100a:
		return "Sparc ESP100A-FAST";
	default:
		panic("Bogon ESP revision");
	};
}

/* From Wolfgang Stanglmeier's NCR scsi driver. */
struct info_str
{
	char *buffer;
	int length;
	int offset;
	int pos;
};

static void copy_mem_info(struct info_str *info, char *data, int len)
{
	if (info->pos + len > info->length)
		len = info->length - info->pos;

	if (info->pos + len < info->offset) {
		info->pos += len;
		return;
	}
	if (info->pos < info->offset) {
		data += (info->offset - info->pos);
		len  -= (info->offset - info->pos);
	}

	if (len > 0) {
		memcpy(info->buffer + info->pos, data, len);
		info->pos += len;
	}
}

static int copy_info(struct info_str *info, char *fmt, ...)
{
	va_list args;
	char buf[81];
	int len;

	va_start(args, fmt);
	len = vsprintf(buf, fmt, args);
	va_end(args);

	copy_mem_info(info, buf, len);
	return len;
}

static int esp_host_info(struct Sparc_ESP *esp, char *ptr, off_t offset, int len)
{
	struct info_str info;
	int i;

	info.buffer	= ptr;
	info.length	= len;
	info.offset	= offset;
	info.pos	= 0;

	copy_info(&info, "Sparc ESP Host Adapter:\n");
	copy_info(&info, "\tPROM node\t\t%08lx\n", (unsigned long) esp->prom_node);
	copy_info(&info, "\tPROM name\t\t%s\n", esp->prom_name);
	copy_info(&info, "\tESP Model\t\t");
	switch(esp->erev) {
	case esp100:
		copy_info(&info, "ESP100\n");
		break;
	case esp100a:
		copy_info(&info, "ESP100A\n");
		break;
	case esp236:
		copy_info(&info, "ESP236\n");
		break;
	case fas236:
		copy_info(&info, "FAS236\n");
		break;
	case fas100a:
		copy_info(&info, "FAS100A\n");
		break;
	case fast:
		copy_info(&info, "FAST\n");
		break;
	case fashme:
		copy_info(&info, "Happy Meal FAS\n");
		break;
	case espunknown:
	default:
		copy_info(&info, "Unknown!\n");
		break;
	};
	copy_info(&info, "\tDMA Revision\t\t");
	switch(esp->dma->revision) {
	case dvmarev0:
		copy_info(&info, "Rev 0\n");
		break;
	case dvmaesc1:
		copy_info(&info, "ESC Rev 1\n");
		break;
	case dvmarev1:
		copy_info(&info, "Rev 1\n");
		break;
	case dvmarev2:
		copy_info(&info, "Rev 2\n");
		break;
	case dvmarev3:
		copy_info(&info, "Rev 3\n");
		break;
	case dvmarevplus:
		copy_info(&info, "Rev 1+\n");
		break;
	case dvmahme:
		copy_info(&info, "Rev HME/FAS\n");
		break;
	default:
		copy_info(&info, "Unknown!\n");
		break;
	};
	copy_info(&info, "\tLive Targets\t\t[ ");
	for(i = 0; i < 15; i++) {
		if(esp->targets_present & (1 << i))
			copy_info(&info, "%d ", i);
	}
	copy_info(&info, "]\n\n");
	
	/* Now describe the state of each existing target. */
	copy_info(&info, "Target #\tconfig3\t\tSync Capabilities\tDisconnect\tWide\n");
	for(i = 0; i < 15; i++) {
		if(esp->targets_present & (1 << i)) {
			Scsi_Device *SDptr = esp->ehost->host_queue;

			while((SDptr->host != esp->ehost) &&
			      (SDptr->id != i) &&
			      (SDptr->next))
				SDptr = SDptr->next;

			copy_info(&info, "%d\t\t", i);
			copy_info(&info, "%08lx\t", esp->config3[i]);
			copy_info(&info, "[%02lx,%02lx]\t\t\t", SDptr->sync_max_offset,
				  SDptr->sync_min_period);
			copy_info(&info, "%s\t\t", SDptr->disconnect ? "yes" : "no");
			copy_info(&info, "%s\n",
				  (esp->config3[i] & ESP_CONFIG3_EWIDE) ? "yes" : "no");
		}
	}

	return info.pos > info.offset? info.pos - info.offset : 0;
}

/* ESP proc filesystem code. */
int esp_proc_info(char *buffer, char **start, off_t offset, int length,
		  int hostno, int inout)
{
	struct Sparc_ESP *esp;

	if(inout)
		return -EINVAL; /* not yet */

	for_each_esp(esp) {
		if(esp->ehost->host_no == hostno)
			break;
	}
	if(!esp)
		return -EINVAL;

	if(start)
		*start = buffer;

	return esp_host_info(esp, buffer, offset, length);
}

/* Some rules:
 *
 *   1) Never ever panic while something is live on the bus.
 *      If there is to be any chance of syncing the disks this
 *      rule is to be obeyed.
 *
 *   2) Any target that causes a foul condition will no longer
 *      have synchronous transfers done to it, no questions
 *      asked.
 *
 *   3) Keep register accesses to a minimum.  Think about some
 *      day when we have Xbus machines this is running on and
 *      the ESP chip is on the other end of the machine on a
 *      different board from the cpu where this is running.
 */

/* Fire off a command.  We assume the bus is free and that the only
 * case where we could see an interrupt is where we have disconnected
 * commands active and they are trying to reselect us.
 */
static inline void esp_check_cmd(struct Sparc_ESP *esp, Scsi_Cmnd *sp)
{
	switch(sp->cmd_len) {
	case 6:
	case 10:
	case 12:
		esp->esp_slowcmd = 0;
		break;

	default:
		esp->esp_slowcmd = 1;
		esp->esp_scmdleft = sp->cmd_len;
		esp->esp_scmdp = &sp->cmnd[0];
		break;
	};
}

static inline void build_sync_nego_msg(struct Sparc_ESP *esp, int period, int offset)
{
	esp->cur_msgout[0] = EXTENDED_MESSAGE;
	esp->cur_msgout[1] = 3;
	esp->cur_msgout[2] = EXTENDED_SDTR;
	esp->cur_msgout[3] = period;
	esp->cur_msgout[4] = offset;
	esp->msgout_len = 5;
}

/* SIZE is in bits, currently HME only supports 16 bit wide transfers. */
static inline void build_wide_nego_msg(struct Sparc_ESP *esp, int size)
{
	esp->cur_msgout[0] = EXTENDED_MESSAGE;
	esp->cur_msgout[1] = 2;
	esp->cur_msgout[2] = EXTENDED_WDTR;
	switch(size) {
	case 32:
		esp->cur_msgout[3] = 2;
		break;
	case 16:
		esp->cur_msgout[3] = 1;
		break;
	case 8:
	default:
		esp->cur_msgout[3] = 0;
		break;
	};

	esp->msgout_len = 4;
}

static inline void esp_exec_cmd(struct Sparc_ESP *esp)
{
	struct sparc_dma_registers *dregs = esp->dregs;
	struct Sparc_ESP_regs *eregs = esp->eregs;
	Scsi_Cmnd *SCptr;
	Scsi_Device *SDptr;
	volatile unchar *cmdp = esp->esp_command;
	unsigned char the_esp_command;
	int lun, target;
	int i;

	/* Hold off if we've been reselected or an IRQ is showing... */
	if(esp->disconnected_SC || DMA_IRQ_P(dregs))
		return;

	/* Grab first member of the issue queue. */
	SCptr = esp->current_SC = remove_first_SC(&esp->issue_SC);

	/* Safe to panic here because current_SC is null. */
	if(!SCptr) panic("esp: esp_exec_cmd and issue queue is NULL");

	SDptr = SCptr->device;
	lun = SCptr->lun;
	target = SCptr->target;

	esp->snip = 0;
	esp->msgout_len = 0;

	/* Send it out whole, or piece by piece?   The ESP
	 * only knows how to automatically send out 6, 10,
	 * and 12 byte commands.  I used to think that the
	 * Linux SCSI code would never throw anything other
	 * than that to us, but then again there is the
	 * SCSI generic driver which can send us anything.
	 */
	esp_check_cmd(esp, SCptr);

	/* If arbitration/selection is successful, the ESP will leave
	 * ATN asserted, causing the target to go into message out
	 * phase.  The ESP will feed the target the identify and then
	 * the target can only legally go to one of command,
	 * datain/out, status, or message in phase, or stay in message
	 * out phase (should we be trying to send a sync negotiation
	 * message after the identify).  It is not allowed to drop
	 * BSY, but some buggy targets do and we check for this
	 * condition in the selection complete code.  Most of the time
	 * we'll make the command bytes available to the ESP and it
	 * will not interrupt us until it finishes command phase, we
	 * cannot do this for command sizes the ESP does not
	 * understand and in this case we'll get interrupted right
	 * when the target goes into command phase.
	 *
	 * It is absolutely _illegal_ in the presence of SCSI-2 devices
	 * to use the ESP select w/o ATN command.  When SCSI-2 devices are
	 * present on the bus we _must_ always go straight to message out
	 * phase with an identify message for the target.  Being that
	 * selection attempts in SCSI-1 w/o ATN was an option, doing SCSI-2
	 * selections should not confuse SCSI-1 we hope.
	 */

	if(SDptr->sync) {
		/* this targets sync is known */
do_sync_known:
		if(SDptr->disconnect)
			*cmdp++ = IDENTIFY(1, lun);
		else
			*cmdp++ = IDENTIFY(0, lun);

		if(esp->esp_slowcmd) {
			the_esp_command = (ESP_CMD_SELAS | ESP_CMD_DMA);
			esp_advance_phase(SCptr, in_slct_stop);
		} else {
			the_esp_command = (ESP_CMD_SELA | ESP_CMD_DMA);
			esp_advance_phase(SCptr, in_slct_norm);
		}
	} else if(!(esp->targets_present & (1<<target)) || !(SDptr->disconnect)) {
		/* After the bootup SCSI code sends both the
		 * TEST_UNIT_READY and INQUIRY commands we want
		 * to at least attempt allowing the device to
		 * disconnect.
		 */
		ESPMISC(("esp: Selecting device for first time. target=%d "
			 "lun=%d\n", target, SCptr->lun));
		if(!SDptr->borken && !SDptr->disconnect)
			SDptr->disconnect = 1;

		*cmdp++ = IDENTIFY(0, lun);
		esp->prevmsgout = NOP;
		esp_advance_phase(SCptr, in_slct_norm);
		the_esp_command = (ESP_CMD_SELA | ESP_CMD_DMA);

		/* Take no chances... */
		SDptr->sync_max_offset = 0;
		SDptr->sync_min_period = 0;
	} else {
		int toshiba_cdrom_hwbug_wkaround = 0;

		/* Never allow disconnects or synchronous transfers on
		 * SparcStation1 and SparcStation1+.  Allowing those
		 * to be enabled seems to lockup the machine completely.
		 */
		if((idprom->id_machtype == (SM_SUN4C | SM_4C_SS1)) ||
		   (idprom->id_machtype == (SM_SUN4C | SM_4C_SS1PLUS))) {
			/* But we are nice and allow tapes to disconnect. */
			if(SDptr->type == TYPE_TAPE)
				SDptr->disconnect = 1;
			else
				SDptr->disconnect = 0;
			SDptr->sync_max_offset = 0;
			SDptr->sync_min_period = 0;
			SDptr->sync = 1;
			esp->snip = 0;
			goto do_sync_known;
		}

		/* We've talked to this guy before,
		 * but never negotiated.  Let's try,
		 * need to attempt WIDE first, before
		 * sync nego, as per SCSI 2 standard.
		 */
		if(esp->erev == fashme && !SDptr->wide) {
			if(!SDptr->borken &&
			   (SDptr->type != TYPE_ROM ||
			    strncmp(SDptr->vendor, "TOSHIBA", 7))) {
				build_wide_nego_msg(esp, 16);
				SDptr->wide = 1;
				esp->wnip = 1;
				goto after_nego_msg_built;
			} else {
				SDptr->wide = 1;
				/* Fall through and try sync. */
			}
		}

		if(!SDptr->borken) {
			if((SDptr->type == TYPE_ROM) &&
			   (!strncmp(SDptr->vendor, "TOSHIBA", 7))) {
				/* Nice try sucker... */
				printk(KERN_INFO "esp%d: Disabling sync for buggy "
				       "Toshiba CDROM.\n", esp->esp_id);
				toshiba_cdrom_hwbug_wkaround = 1;
				build_sync_nego_msg(esp, 0, 0);
			} else {
				build_sync_nego_msg(esp, esp->sync_defp, 15);
			}
		} else {
			build_sync_nego_msg(esp, 0, 0);
		}
		SDptr->sync = 1;
		esp->snip = 1;

after_nego_msg_built:
		/* A fix for broken SCSI1 targets, when they disconnect
		 * they lock up the bus and confuse ESP.  So disallow
		 * disconnects for SCSI1 targets for now until we
		 * find a better fix.
		 *
		 * Addendum: This is funny, I figured out what was going
		 *           on.  The blotzed SCSI1 target would disconnect,
		 *           one of the other SCSI2 targets or both would be
		 *           disconnected as well.  The SCSI1 target would
		 *           stay disconnected long enough that we start
		 *           up a command on one of the SCSI2 targets.  As
		 *           the ESP is arbitrating for the bus the SCSI1
		 *           target begins to arbitrate as well to reselect
		 *           the ESP.  The SCSI1 target refuses to drop it's
		 *           ID bit on the data bus even though the ESP is
		 *           at ID 7 and is the obvious winner for any
		 *           arbitration.  The ESP is a poor sport and refuses
		 *           to lose arbitration, it will continue indefinately
		 *           trying to arbitrate for the bus and can only be
		 *           stopped via a chip reset or SCSI bus reset.
		 *           Therefore _no_ disconnects for SCSI1 targets
		 *           thank you very much. ;-)
		 */
		if(((SDptr->scsi_level < 3) && (SDptr->type != TYPE_TAPE)) ||
#if 1 /* Until I find out why HME barfs with disconnects enabled... */
		   toshiba_cdrom_hwbug_wkaround || SDptr->borken || esp->erev == fashme) {
#else
		   toshiba_cdrom_hwbug_wkaround || SDptr->borken) {
#endif
			printk(KERN_INFO "esp%d: Disabling DISCONNECT for target %d "
			       "lun %d\n", esp->esp_id, SCptr->target, SCptr->lun);
			SDptr->disconnect = 0;
			*cmdp++ = IDENTIFY(0, lun);
		} else {
			*cmdp++ = IDENTIFY(1, lun);
		}

		/* ESP fifo is only so big...
		 * Make this look like a slow command.
		 */
		esp->esp_slowcmd = 1;
		esp->esp_scmdleft = SCptr->cmd_len;
		esp->esp_scmdp = &SCptr->cmnd[0];

		the_esp_command = (ESP_CMD_SELAS | ESP_CMD_DMA);
		esp_advance_phase(SCptr, in_slct_msg);
	}

	if(!esp->esp_slowcmd)
		for(i = 0; i < SCptr->cmd_len; i++)
			*cmdp++ = SCptr->cmnd[i];

	/* HME sucks... */
	if(esp->erev == fashme)
		eregs->esp_busid = (target & 0xf) |
			(ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT);
	else
		eregs->esp_busid = (target & 7);
	eregs->esp_soff = SDptr->sync_max_offset;
	eregs->esp_stp  = SDptr->sync_min_period;
	if(esp->erev > esp100a)
		eregs->esp_cfg3 = esp->config3[target];

	i = (cmdp - esp->esp_command);

	if(esp->erev == fashme) {
		unsigned long tmp;

		esp_cmd(esp, eregs, ESP_CMD_FLUSH); /* Grrr! */

		/* Set up the DMA and HME counters */
		eregs->esp_tclow = i;
		eregs->esp_tcmed = 0;
		eregs->fas_rlo = 0;
		eregs->fas_rhi = 0;
		esp_cmd(esp, eregs, the_esp_command);

		/* Talk about touchy hardware... */
		tmp = dregs->cond_reg;
		tmp |= (DMA_SCSI_DISAB | DMA_ENABLE);
		tmp &= ~(DMA_ST_WRITE);
		dregs->cnt = 16;
		dregs->st_addr = esp->esp_command_dvma;
		dregs->cond_reg = tmp;
	} else {
		/* Set up the DMA and ESP counters */
		eregs->esp_tclow = i;
		eregs->esp_tcmed = 0;
		dregs->cond_reg = ((dregs->cond_reg & ~(DMA_ST_WRITE)) | DMA_ENABLE);
		if(esp->dma->revision == dvmaesc1) {
			if(i) /* Workaround ESC gate array SBUS rerun bug. */
				dregs->cnt = (PAGE_SIZE);
		}
		dregs->st_addr = esp->esp_command_dvma;

		/* Tell ESP to "go". */
		esp_cmd(esp, eregs, the_esp_command);
	}
}

/* Queue a SCSI command delivered from the mid-level Linux SCSI code. */
int esp_queue(Scsi_Cmnd *SCpnt, void (*done)(Scsi_Cmnd *))
{
	struct Sparc_ESP *esp;
	struct sparc_dma_registers *dregs;

	/* Set up func ptr and initial driver cmd-phase. */
	SCpnt->scsi_done = done;
	SCpnt->SCp.phase = not_issued;

	esp = (struct Sparc_ESP *) SCpnt->host->hostdata;
	dregs = esp->dregs;

	/* We use the scratch area. */
	ESPQUEUE(("esp_queue: target=%d lun=%d ", SCpnt->target, SCpnt->lun));
	ESPDISC(("N<%02x,%02x>", SCpnt->target, SCpnt->lun));
	if(!SCpnt->use_sg) {
		ESPQUEUE(("!use_sg\n"));
		SCpnt->SCp.this_residual    = SCpnt->request_bufflen;
		SCpnt->SCp.buffer           =
			(struct scatterlist *) SCpnt->request_buffer;
		SCpnt->SCp.buffers_residual = 0;
		/* Sneaky. */
		SCpnt->SCp.have_data_in = mmu_get_scsi_one((char *)SCpnt->SCp.buffer,
							   SCpnt->SCp.this_residual,
							   esp->edev->my_bus);
		/* XXX The casts are extremely gross, but with 64-bit kernel
		 * XXX and 32-bit SBUS what am I to do? -DaveM
		 */
		SCpnt->SCp.ptr = (char *)((unsigned long)SCpnt->SCp.have_data_in);
	} else {
		ESPQUEUE(("use_sg "));
#ifdef DEBUG_ESP_SG
		printk("esp%d: sglist at %p with %d buffers\n",
		       esp->esp_id, SCpnt->buffer, SCpnt->use_sg);
#endif
		SCpnt->SCp.buffer           = (struct scatterlist *) SCpnt->buffer;
		SCpnt->SCp.buffers_residual = SCpnt->use_sg - 1;
		SCpnt->SCp.this_residual    = SCpnt->SCp.buffer->length;
		mmu_get_scsi_sgl((struct mmu_sglist *) SCpnt->SCp.buffer,
				 SCpnt->SCp.buffers_residual,
				 esp->edev->my_bus);
		/* XXX Again these casts are sick... -DaveM */
		SCpnt->SCp.ptr=(char *)((unsigned long)SCpnt->SCp.buffer->dvma_address);
	}
	SCpnt->SCp.Status           = CHECK_CONDITION;
	SCpnt->SCp.Message          = 0xff;
	SCpnt->SCp.sent_command     = 0;

	/* Place into our queue. */
	if(SCpnt->cmnd[0] == REQUEST_SENSE) {
		ESPQUEUE(("RQSENSE\n"));
		prepend_SC(&esp->issue_SC, SCpnt);
	} else {
		ESPQUEUE(("\n"));
		append_SC(&esp->issue_SC, SCpnt);
	}

	/* Run it now if we can. */
	if(!esp->current_SC && !esp->resetting_bus)
		esp_exec_cmd(esp);

	return 0;
}

/* Only queuing supported in this ESP driver. */
int esp_command(Scsi_Cmnd *SCpnt)
{
	struct Sparc_ESP *esp = (struct Sparc_ESP *) SCpnt->host->hostdata;

	ESPLOG(("esp%d: esp_command() called...\n", esp->esp_id));
	return -1;
}

/* Dump driver state. */
static inline void esp_dump_cmd(Scsi_Cmnd *SCptr)
{
	ESPLOG(("[tgt<%02x> lun<%02x> "
		"pphase<%s> cphase<%s>]",
		SCptr->target, SCptr->lun,
		phase_string(SCptr->SCp.sent_command),
		phase_string(SCptr->SCp.phase)));
}

static inline void esp_dump_state(struct Sparc_ESP *esp, struct Sparc_ESP_regs *eregs,
				  struct sparc_dma_registers *dregs)
{
	Scsi_Cmnd *SCptr = esp->current_SC;
#ifdef DEBUG_ESP_CMDS
	int i;
#endif

	ESPLOG(("esp%d: dumping state\n", esp->esp_id));
	ESPLOG(("esp%d: dma -- cond_reg<%08x> addr<%08x>\n",
		esp->esp_id, dregs->cond_reg, dregs->st_addr));
	ESPLOG(("esp%d: SW [sreg<%02x> sstep<%02x> ireg<%02x>]\n",
		esp->esp_id, esp->sreg, esp->seqreg, esp->ireg));
	ESPLOG(("esp%d: HW reread [sreg<%02x> sstep<%02x> ireg<%02x>]\n",
		esp->esp_id, eregs->esp_status, eregs->esp_sstep, eregs->esp_intrpt));
#ifdef DEBUG_ESP_CMDS
	printk("esp%d: last ESP cmds [", esp->esp_id);
	i = (esp->espcmdent - 1) & 31;
	printk("<");
	esp_print_cmd(esp->espcmdlog[i]);
	printk(">");
	i = (i - 1) & 31;
	printk("<");
	esp_print_cmd(esp->espcmdlog[i]);
	printk(">");
	i = (i - 1) & 31;
	printk("<");
	esp_print_cmd(esp->espcmdlog[i]);
	printk(">");
	i = (i - 1) & 31;
	printk("<");
	esp_print_cmd(esp->espcmdlog[i]);
	printk(">");
	printk("]\n");
#endif /* (DEBUG_ESP_CMDS) */

	if(SCptr) {
		ESPLOG(("esp%d: current command ", esp->esp_id));
		esp_dump_cmd(SCptr);
	}
	ESPLOG(("\n"));
	SCptr = esp->disconnected_SC;
	ESPLOG(("esp%d: disconnected ", esp->esp_id));
	while(SCptr) {
		esp_dump_cmd(SCptr);
		SCptr = (Scsi_Cmnd *) SCptr->host_scribble;
	}
	ESPLOG(("\n"));
}

/* Abort a command. */
int esp_abort(Scsi_Cmnd *SCptr)
{
	struct Sparc_ESP *esp = (struct Sparc_ESP *) SCptr->host->hostdata;
	struct Sparc_ESP_regs *eregs = esp->eregs;
	struct sparc_dma_registers *dregs = esp->dregs;
	int don;

	ESPLOG(("esp%d: Aborting command\n", esp->esp_id));
	esp_dump_state(esp, eregs, dregs);

	/* Wheee, if this is the current command on the bus, the
	 * best we can do is assert ATN and wait for msgout phase.
	 * This should even fix a hung SCSI bus when we lose state
	 * in the driver and timeout because the eventual phase change
	 * will cause the ESP to (eventually) give an interrupt.
	 */
	if(esp->current_SC == SCptr) {
		esp->cur_msgout[0] = ABORT;
		esp->msgout_len = 1;
		esp->msgout_ctr = 0;
		esp_cmd(esp, eregs, ESP_CMD_SATN);
		return SCSI_ABORT_PENDING;
	}

	/* If it is still in the issue queue then we can safely
	 * call the completion routine and report abort success.
	 */
	don = (dregs->cond_reg & DMA_INT_ENAB);
	if(don) {
		DMA_INTSOFF(dregs);
		synchronize_irq();
	}
	if(esp->issue_SC) {
		Scsi_Cmnd **prev, *this;
		for(prev = (&esp->issue_SC), this = esp->issue_SC;
		    this;
		    prev = (Scsi_Cmnd **) &(this->host_scribble),
		    this = (Scsi_Cmnd *) this->host_scribble) {
			if(this == SCptr) {
				*prev = (Scsi_Cmnd *) this->host_scribble;
				this->host_scribble = NULL;
				this->result = DID_ABORT << 16;
				this->done(this);
				if(don)
					DMA_INTSON(dregs);
				return SCSI_ABORT_SUCCESS;
			}
		}
	}

	/* Yuck, the command to abort is disconnected, it is not
	 * worth trying to abort it now if something else is live
	 * on the bus at this time.  So, we let the SCSI code wait
	 * a little bit and try again later.
	 */
	if(esp->current_SC)
		return SCSI_ABORT_BUSY;

	/* It's disconnected, we have to reconnect to re-establish
	 * the nexus and tell the device to abort.  However, we really
	 * cannot 'reconnect' per se, therefore we tell the upper layer
	 * the safest thing we can.  This is, wait a bit, if nothing
	 * happens, we are really hung so reset the bus.
	 */

	return SCSI_ABORT_SNOOZE;
}

/* Reset ESP chip, reset hanging bus, then kill active and
 * disconnected commands for targets without soft reset.
 */
int esp_reset(Scsi_Cmnd *SCptr, unsigned int how)
{
	struct Sparc_ESP *esp = (struct Sparc_ESP *) SCptr->host->hostdata;
	struct Sparc_ESP_regs *eregs = esp->eregs;

	ESPLOG(("esp%d: Resetting scsi bus\n", esp->esp_id));
	esp->resetting_bus = 1;
	esp_cmd(esp, eregs, ESP_CMD_RS);
	return SCSI_RESET_PENDING;
}

/* Internal ESP done function. */
static void esp_done(struct Sparc_ESP *esp, int error)
{
	Scsi_Cmnd *done_SC;

	if(esp->current_SC) {
		done_SC = esp->current_SC;
		esp->current_SC = NULL;

		/* Free dvma entry. */
		if(!done_SC->use_sg) {
			/* Sneaky. */
			mmu_release_scsi_one(done_SC->SCp.have_data_in,
					     done_SC->request_bufflen,
					     esp->edev->my_bus);
		} else {
#ifdef DEBUG_ESP_SG
			printk("esp%d: unmapping sg ", esp->esp_id);
#endif
			mmu_release_scsi_sgl((struct mmu_sglist *) done_SC->buffer,
					     done_SC->use_sg - 1,
					     esp->edev->my_bus);
#ifdef DEBUG_ESP_SG
			printk("done.\n");
#endif
		}

		done_SC->result = error;
		done_SC->scsi_done(done_SC);

		/* Bus is free, issue any commands in the queue. */
		if(esp->issue_SC && !esp->current_SC)
			esp_exec_cmd(esp);
	} else {
		/* Panic is safe as current_SC is null so we may still
		 * be able to accept more commands to sync disk buffers.
		 */
		ESPLOG(("panicing\n"));
		panic("esp: done() called with NULL esp->current_SC");
	}
}

/* Wheee, ESP interrupt engine. */  

enum {
	do_phase_determine, do_reset_bus, do_reset_complete,
	do_work_bus, do_intr_end,
};

/* Forward declarations. */
static int esp_do_phase_determine(struct Sparc_ESP *esp, struct Sparc_ESP_regs *eregs,
				  struct sparc_dma_registers *dregs);
static int esp_do_data_finale(struct Sparc_ESP *esp, struct Sparc_ESP_regs *eregs,
			      struct sparc_dma_registers *dregs);
static int esp_select_complete(struct Sparc_ESP *esp, struct Sparc_ESP_regs *eregs,
			       struct sparc_dma_registers *dregs);
static int esp_do_status(struct Sparc_ESP *esp, struct Sparc_ESP_regs *eregs,
			 struct sparc_dma_registers *dregs);
static int esp_do_msgin(struct Sparc_ESP *esp, struct Sparc_ESP_regs *eregs,
			struct sparc_dma_registers *dregs);
static int esp_do_msgindone(struct Sparc_ESP *esp, struct Sparc_ESP_regs *eregs,
			    struct sparc_dma_registers *dregs);
static int esp_do_msgout(struct Sparc_ESP *esp, struct Sparc_ESP_regs *eregs,
			 struct sparc_dma_registers *dregs);
static int esp_do_cmdbegin(struct Sparc_ESP *esp, struct Sparc_ESP_regs *eregs,
			   struct sparc_dma_registers *dregs);

static inline int sreg_datainp(unchar sreg)
{
	return (sreg & ESP_STAT_PMASK) == ESP_DIP;
}

static inline int sreg_dataoutp(unchar sreg)
{
	return (sreg & ESP_STAT_PMASK) == ESP_DOP;
}

/* Did they drop these fabs on the floor or what?!?!! */
static inline void hme_fifo_hwbug_workaround(struct Sparc_ESP *esp,
					     struct Sparc_ESP_regs *eregs)
{
	unchar status = esp->sreg;

	/* Cannot safely frob the fifo for these following cases. */
	if(sreg_datainp(status) || sreg_dataoutp(status) ||
	   (esp->current_SC && esp->current_SC->SCp.phase == in_data_done)) {
		ESPHME(("<wkaround_skipped>"));
		return;
	} else {
		unsigned long count = 0;
		unsigned long fcnt = eregs->esp_fflags & ESP_FF_FBYTES;

		/* The HME stores bytes in multiples of 2 in the fifo. */
		ESPHME(("hme_fifo[fcnt=%d", (int)fcnt));
		while(fcnt) {
			esp->hme_fifo_workaround_buffer[count++] = eregs->esp_fdata;
			esp->hme_fifo_workaround_buffer[count++] = eregs->esp_fdata;
			ESPHME(("<%02x,%02x>", esp->hme_fifo_workaround_buffer[count-2], esp->hme_fifo_workaround_buffer[count-1]));
			fcnt--;
		}
		if(eregs->esp_status2 & ESP_STAT2_F1BYTE) {
			ESPHME(("<poke_byte>"));
			eregs->esp_fdata = 0;
			esp->hme_fifo_workaround_buffer[count++] = eregs->esp_fdata;
			ESPHME(("<%02x,0x00>", esp->hme_fifo_workaround_buffer[count-1]));
			ESPHME(("CMD_FLUSH"));
			esp_cmd(esp, eregs, ESP_CMD_FLUSH);
		} else {
			ESPHME(("no_xtra_byte"));
		}
		esp->hme_fifo_workaround_count = count;
		ESPHME(("wkarnd_cnt=%d]", (int)count));
	}
}

static inline void hme_fifo_push(struct Sparc_ESP *esp, struct Sparc_ESP_regs *eregs,
				 unchar *bytes, unchar count)
{
	esp_cmd(esp, eregs, ESP_CMD_FLUSH);
	while(count) {
		eregs->esp_fdata = *bytes++;
		eregs->esp_fdata = 0;
		count--;
	}
}

/* We try to avoid some interrupts by jumping ahead and see if the ESP
 * has gotten far enough yet.  Hence the following.
 */
static inline int skipahead1(struct Sparc_ESP *esp, struct Sparc_ESP_regs *eregs,
			     struct sparc_dma_registers *dregs,
			     Scsi_Cmnd *scp, int prev_phase, int new_phase)
{
	if(scp->SCp.sent_command != prev_phase)
		return 0;
	if(DMA_IRQ_P(dregs)) {
		/* Yes, we are able to save an interrupt. */
		esp->sreg = eregs->esp_status;
		if(esp->erev == fashme) {
			/* This chip is really losing. */
			ESPHME(("HME["));
			/* Must latch fifo before reading the interrupt
			 * register else garbage ends up in the FIFO
			 * which confuses the driver utterly.
			 * Happy Meal indeed....
			 */
			ESPHME(("fifo_workaround]"));
			hme_fifo_hwbug_workaround(esp, eregs);
		}
		esp->ireg = eregs->esp_intrpt;
		esp->sreg &= ~(ESP_STAT_INTR);
		if(!(esp->ireg & ESP_INTR_SR))
			return 0;
		else
			return do_reset_complete;
	}
	/* Ho hum, target is taking forever... */
	scp->SCp.sent_command = new_phase; /* so we don't recurse... */
	return do_intr_end;
}

static inline int skipahead2(struct Sparc_ESP *esp, struct Sparc_ESP_regs *eregs,
			     struct sparc_dma_registers *dregs,
			     Scsi_Cmnd *scp, int prev_phase1, int prev_phase2,
			     int new_phase)
{
	if(scp->SCp.sent_command != prev_phase1 &&
	   scp->SCp.sent_command != prev_phase2)
		return 0;
	if(DMA_IRQ_P(dregs)) {
		/* Yes, we are able to save an interrupt. */
		esp->sreg = eregs->esp_status;
		if(esp->erev == fashme) {
			/* This chip is really losing. */
			ESPHME(("HME["));

			/* Must latch fifo before reading the interrupt
			 * register else garbage ends up in the FIFO
			 * which confuses the driver utterly.
			 * Happy Meal indeed....
			 */
			ESPHME(("fifo_workaround]"));
			hme_fifo_hwbug_workaround(esp, eregs);
		}
		esp->ireg = eregs->esp_intrpt;
		esp->sreg &= ~(ESP_STAT_INTR);
		if(!(esp->ireg & ESP_INTR_SR))
			return 0;
		else
			return do_reset_complete;
	}
	/* Ho hum, target is taking forever... */
	scp->SCp.sent_command = new_phase; /* so we don't recurse... */
	return do_intr_end;
}

/* Now some dma helpers. */
static inline void dma_setup(struct sparc_dma_registers *dregs, enum dvma_rev drev,
			     __u32 addr, int count, int write)
{
	unsigned long nreg = dregs->cond_reg;
	if(write)
		nreg |= DMA_ST_WRITE;
	else
		nreg &= ~(DMA_ST_WRITE);
	nreg |= DMA_ENABLE;
	dregs->cond_reg = nreg;
	if(drev == dvmaesc1) {
		/* This ESC gate array sucks! */
		__u32 src = addr;
		__u32 dest = src + count;

		if(dest & (PAGE_SIZE - 1))
			count = PAGE_ALIGN(count);
		dregs->cnt = count;
	}
	dregs->st_addr = addr;
}

static inline void dma_drain(struct sparc_dma_registers *dregs, enum dvma_rev drev)
{
	if(drev == dvmahme)
		return;
	if(dregs->cond_reg & DMA_FIFO_ISDRAIN) {
		switch(drev) {
		default:
			dregs->cond_reg |= DMA_FIFO_STDRAIN;

		case dvmarev3:
		case dvmaesc1:
			while(dregs->cond_reg & DMA_FIFO_ISDRAIN)
				udelay(1);
		};
	}
}

static inline void dma_invalidate(struct sparc_dma_registers *dregs, enum dvma_rev drev)
{
	unsigned int tmp;

	if(drev == dvmahme) {
		/* SMCC can bite me. */
		tmp = dregs->cond_reg;
		dregs->cond_reg = DMA_RST_SCSI;

		/* This would explain a lot. */
		tmp |= (DMA_PARITY_OFF|DMA_2CLKS|DMA_SCSI_DISAB);

		tmp &= ~(DMA_ENABLE|DMA_ST_WRITE);
		dregs->cond_reg = 0;
		dregs->cond_reg = tmp;
	} else {
		while(dregs->cond_reg & DMA_PEND_READ)
			udelay(1);

		tmp = dregs->cond_reg;
		tmp &= ~(DMA_ENABLE | DMA_ST_WRITE | DMA_BCNT_ENAB);
		tmp |= DMA_FIFO_INV;
		dregs->cond_reg = tmp;
		dregs->cond_reg = (tmp & ~(DMA_FIFO_INV));
	}
}

static inline void dma_flashclear(struct sparc_dma_registers *dregs, enum dvma_rev drev)
{
	dma_drain(dregs, drev);
	dma_invalidate(dregs, drev);
}

static inline int dma_can_transfer(Scsi_Cmnd *sp, enum dvma_rev drev)
{
	__u32 base, end, sz;

	if(drev == dvmarev3) {
		sz = sp->SCp.this_residual;
		if(sz > 0x1000000)
			sz = 0x1000000;
	} else {
		base = ((__u32)((unsigned long)sp->SCp.ptr));
		base &= (0x1000000 - 1);
		end = (base + sp->SCp.this_residual);
		if(end > 0x1000000)
			end = 0x1000000;
		sz = (end - base);
	}
	return sz;
}

/* Misc. esp helper routines. */
static inline void esp_setcount(struct Sparc_ESP_regs *eregs, int cnt, int hme)
{
	eregs->esp_tclow = (cnt & 0xff);
	eregs->esp_tcmed = ((cnt >> 8) & 0xff);
	if(hme) {
		eregs->fas_rlo = 0;
		eregs->fas_rhi = 0;
	}
}

static inline int esp_getcount(struct Sparc_ESP_regs *eregs)
{
	return (((eregs->esp_tclow)&0xff) |
		(((eregs->esp_tcmed)&0xff) << 8));
}

static inline int fcount(struct Sparc_ESP *esp, struct Sparc_ESP_regs *eregs)
{
	if(esp->erev == fashme)
		return esp->hme_fifo_workaround_count;
	else
		return eregs->esp_fflags & ESP_FF_FBYTES;
}

static inline int fnzero(struct Sparc_ESP *esp, struct Sparc_ESP_regs *eregs)
{
	if(esp->erev == fashme)
		return 0;
	else
		return eregs->esp_fflags & ESP_FF_ONOTZERO;
}

/* XXX speculative nops unnecessary when continuing amidst a data phase
 * XXX even on esp100!!!  another case of flooding the bus with I/O reg
 * XXX writes...
 */
static inline void esp_maybe_nop(struct Sparc_ESP *esp, struct Sparc_ESP_regs *eregs)
{
	if(esp->erev == esp100)
		esp_cmd(esp, eregs, ESP_CMD_NULL);
}

static inline int sreg_to_dataphase(unchar sreg)
{
	if((sreg & ESP_STAT_PMASK) == ESP_DOP)
		return in_dataout;
	else
		return in_datain;
}

/* The ESP100 when in synchronous data phase, can mistake a long final
 * REQ pulse from the target as an extra byte, it places whatever is on
 * the data lines into the fifo.  For now, we will assume when this
 * happens that the target is a bit quirky and we don't want to
 * be talking synchronously to it anyways.  Regardless, we need to
 * tell the ESP to eat the extraneous byte so that we can proceed
 * to the next phase.
 */
static inline int esp100_sync_hwbug(struct Sparc_ESP *esp, struct Sparc_ESP_regs *eregs,
				    Scsi_Cmnd *sp, int fifocnt)
{
	/* Do not touch this piece of code. */
	if((!(esp->erev == esp100)) ||
	   (!(sreg_datainp((esp->sreg = eregs->esp_status)) && !fifocnt) &&
	    !(sreg_dataoutp(esp->sreg) && !fnzero(esp, eregs)))) {
		if(sp->SCp.phase == in_dataout)
			esp_cmd(esp, eregs, ESP_CMD_FLUSH);
		return 0;
	} else {
		/* Async mode for this guy. */
		build_sync_nego_msg(esp, 0, 0);

		/* Ack the bogus byte, but set ATN first. */
		esp_cmd(esp, eregs, ESP_CMD_SATN);
		esp_cmd(esp, eregs, ESP_CMD_MOK);
		return 1;
	}
}

/* This closes the window during a selection with a reselect pending, because
 * we use DMA for the selection process the FIFO should hold the correct
 * contents if we get reselected during this process.  So we just need to
 * ack the possible illegal cmd interrupt pending on the esp100.
 */
static inline int esp100_reconnect_hwbug(struct Sparc_ESP *esp,
					 struct Sparc_ESP_regs *eregs)
{
	volatile unchar junk;

	if(esp->erev != esp100)
		return 0;
	junk = eregs->esp_intrpt;
	if(junk & ESP_INTR_SR)
		return 1;
	return 0;
}

/* This verifies the BUSID bits during a reselection so that we know which
 * target is talking to us.
 */
static inline int reconnect_target(struct Sparc_ESP *esp, struct Sparc_ESP_regs *eregs)
{
	int it, me = esp->scsi_id_mask, targ = 0;

	if(2 != fcount(esp, eregs))
		return -1;
	if(esp->erev == fashme) {
		/* HME does not latch it's own BUS ID bits during
		 * a reselection.  Also the target number is given
		 * as an unsigned char, not as a sole bit number
		 * like the other ESP's do.
		 * Happy Meal indeed....
		 */
		targ = esp->hme_fifo_workaround_buffer[0];
	} else {
		it = eregs->esp_fdata;
		if(!(it & me))
			return -1;
		it &= ~me;
		if(it & (it - 1))
			return -1;
		while(!(it & 1))
			targ++, it >>= 1;
	}
	return targ;
}

/* This verifies the identify from the target so that we know which lun is
 * being reconnected.
 */
static inline int reconnect_lun(struct Sparc_ESP *esp, struct Sparc_ESP_regs *eregs)
{
	int lun;

	if((esp->sreg & ESP_STAT_PMASK) != ESP_MIP)
		return -1;
	if(esp->erev == fashme)
		lun = esp->hme_fifo_workaround_buffer[1];
	else
		lun = eregs->esp_fdata;
	if(esp->sreg & ESP_STAT_PERR)
		return 0;
	if((lun & 0x40) || !(lun & 0x80))
		return -1;
	return lun & 7;
}

/* This puts the driver in a state where it can revitalize a command that
 * is being continued due to reselection.
 */
static inline void esp_connect(struct Sparc_ESP *esp, struct Sparc_ESP_regs *eregs,
			       Scsi_Cmnd *sp)
{
	Scsi_Device *dp = sp->device;
	eregs->esp_soff = dp->sync_max_offset;
	eregs->esp_stp  = dp->sync_min_period;
	if(esp->erev > esp100a)
		eregs->esp_cfg3 = esp->config3[sp->target];
	if(esp->erev == fashme)
		eregs->esp_busid = (sp->target & 0xf) |
			(ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT);
	esp->current_SC = sp;
}

/* This will place the current working command back into the issue queue
 * if we are to receive a reselection amidst a selection attempt.
 */
static inline void esp_reconnect(struct Sparc_ESP *esp, Scsi_Cmnd *sp)
{
	if(!esp->disconnected_SC)
		printk("esp%d: Weird, being reselected but disconnected "
		       "command queue is empty.\n", esp->esp_id);
	esp->snip = 0;
	esp->current_SC = 0;
	sp->SCp.phase = not_issued;
	append_SC(&esp->issue_SC, sp);
}

/* Begin message in phase. */
static inline int esp_do_msgin(struct Sparc_ESP *esp, struct Sparc_ESP_regs *eregs,
			       struct sparc_dma_registers *dregs)
{
	/* Must be very careful with the fifo on the HME */
	if((esp->erev != fashme) || !(eregs->esp_status2 & ESP_STAT2_FEMPTY))
		esp_cmd(esp, eregs, ESP_CMD_FLUSH);
	esp_maybe_nop(esp, eregs);
	esp_cmd(esp, eregs, ESP_CMD_TI);
	esp->msgin_len = 1;
	esp->msgin_ctr = 0;
	esp_advance_phase(esp->current_SC, in_msgindone);
	return do_work_bus;
}

/* This uses various DMA csr fields and the fifo flags count value to
 * determine how many bytes were successfully sent/received by the ESP.
 */
static inline int esp_bytes_sent(struct Sparc_ESP *esp,
				 struct sparc_dma_registers *dregs,
				 int fifo_count)
{
	int rval = dregs->st_addr - esp->esp_command_dvma;

	if(esp->dma->revision == dvmarev1)
		rval -= (4 - ((dregs->cond_reg & DMA_READ_AHEAD)>>11));
	return rval - fifo_count;
}

static inline void advance_sg(Scsi_Cmnd *sp)
{
	++sp->SCp.buffer;
	--sp->SCp.buffers_residual;
	sp->SCp.this_residual = sp->SCp.buffer->length;
	sp->SCp.ptr = (char *)((unsigned long)sp->SCp.buffer->dvma_address);
}

/* Please note that the way I've coded these routines is that I _always_
 * check for a disconnect during any and all information transfer
 * phases.  The SCSI standard states that the target _can_ cause a BUS
 * FREE condition by dropping all MSG/CD/IO/BSY signals.  Also note
 * that during information transfer phases the target controls every
 * change in phase, the only thing the initiator can do is "ask" for
 * a message out phase by driving ATN true.  The target can, and sometimes
 * will, completely ignore this request so we cannot assume anything when
 * we try to force a message out phase to abort/reset a target.  Most of
 * the time the target will eventually be nice and go to message out, so
 * we may have to hold on to our state about what we want to tell the target
 * for some period of time.
 */

/* I think I have things working here correctly.  Even partial transfers
 * within a buffer or sub-buffer should not upset us at all no matter
 * how bad the target and/or ESP fucks things up.
 */
static inline int esp_do_data(struct Sparc_ESP *esp, struct Sparc_ESP_regs *eregs,
			      struct sparc_dma_registers *dregs)
{
	Scsi_Cmnd *SCptr = esp->current_SC;
	int thisphase, hmuch;

	ESPDATA(("esp_do_data: "));
	esp_maybe_nop(esp, eregs);
	thisphase = sreg_to_dataphase(esp->sreg);
	esp_advance_phase(SCptr, thisphase);
	ESPDATA(("newphase<%s> ", (thisphase == in_datain) ? "DATAIN" : "DATAOUT"));
	hmuch = dma_can_transfer(SCptr, esp->dma->revision);
	ESPDATA(("hmuch<%d> ", hmuch));
	esp->current_transfer_size = hmuch;
	if(esp->erev == fashme) {
		unsigned long tmp = dregs->cond_reg;

		/* Touchy chip, this stupid HME scsi adapter... */
		esp_setcount(eregs, hmuch, 1);
		esp_cmd(esp, eregs, ESP_CMD_DMA | ESP_CMD_TI);
		dregs->cnt = hmuch;
		tmp |= (DMA_SCSI_DISAB | DMA_ENABLE);
		if(thisphase == in_datain)
			tmp |= DMA_ST_WRITE;
		else
			tmp &= ~(DMA_ST_WRITE);
		dregs->st_addr = ((__u32)((unsigned long)SCptr->SCp.ptr));
		dregs->cond_reg = tmp;
	} else {
		esp_setcount(eregs, hmuch, 0);
		dma_setup(dregs, esp->dma->revision,
			  ((__u32)((unsigned long)SCptr->SCp.ptr)),
			  hmuch, (thisphase == in_datain));
		ESPDATA(("DMA|TI --> do_intr_end\n"));
		esp_cmd(esp, eregs, ESP_CMD_DMA | ESP_CMD_TI);
	}
	return do_intr_end;
}

/* See how successful the data transfer was. */
static inline int esp_do_data_finale(struct Sparc_ESP *esp,
				     struct Sparc_ESP_regs *eregs,
				     struct sparc_dma_registers *dregs)
{
	Scsi_Cmnd *SCptr = esp->current_SC;
	int bogus_data = 0, bytes_sent = 0, fifocnt, ecount = 0;

	ESPDATA(("esp_do_data_finale: "));

	if(SCptr->SCp.phase == in_datain) {
		if(esp->sreg & ESP_STAT_PERR) {
			/* Yuck, parity error.  The ESP asserts ATN
			 * so that we can go to message out phase
			 * immediately and inform the target that
			 * something bad happened.
			 */
			ESPLOG(("esp%d: data bad parity detected.\n",
				esp->esp_id));
			esp->cur_msgout[0] = INITIATOR_ERROR;
			esp->msgout_len = 1;
		}
		dma_drain(dregs, esp->dma->revision);
	}
	dma_invalidate(dregs, esp->dma->revision);

	/* This could happen for the above parity error case. */
	if(!(esp->ireg == ESP_INTR_BSERV)) {
		/* Please go to msgout phase, please please please... */
		ESPLOG(("esp%d: !BSERV after data, probably to msgout\n",
			esp->esp_id));
		return esp_do_phase_determine(esp, eregs, dregs);
	}	

	/* Check for partial transfers and other horrible events.
	 * Note, here we read the real fifo flags register even
	 * on HME broken adapters because we skip the HME fifo
	 * workaround code in esp_handle() if we are doing data
	 * phase things.  We don't want to fuck directly with
	 * the fifo like that, especially if doing syncronous
	 * transfers!  Also, will need to double the count on
	 * HME if we are doing wide transfers, as the HME fifo
	 * will move and count 16-bit quantities during wide data.
	 * SMCC _and_ Qlogic can both bite me.
	 */
	fifocnt = eregs->esp_fflags & ESP_FF_FBYTES;
	if(esp->erev != fashme)
		ecount = esp_getcount(eregs);
	bytes_sent = esp->current_transfer_size;

	/* Uhhh, might not want both of these conditionals to run
	 * at once on HME due to the fifo problems it has.  Consider
	 * changing it to:
	 *
	 * 	if(!(esp->sreg & ESP_STAT_TCNT)) {
	 * 		bytes_sent -= ecount;
	 * 	} else if(SCptr->SCp.phase == in_dataout) {
	 * 		bytes_sent -= fifocnt;
	 *	}
	 *
	 * But only for the HME case, leave the current code alone
	 * for all other ESP revisions as we know the existing code
	 * works just fine for them.
	 */
	ESPDATA(("trans_sz=%d, ", bytes_sent));
	if(esp->erev == fashme) {
		if(!(esp->sreg & ESP_STAT_TCNT)) {
			bytes_sent -= esp_getcount(eregs);
		} else if(SCptr->SCp.phase == in_dataout) {
			bytes_sent -= fifocnt;
		}
	} else {
		if(!(esp->sreg & ESP_STAT_TCNT))
			bytes_sent -= ecount;
		if(SCptr->SCp.phase == in_dataout)
			bytes_sent -= fifocnt;
	}

	ESPDATA(("bytes_sent=%d, ", bytes_sent));

	/* If we were in synchronous mode, check for peculiarities. */
	if(esp->erev == fashme) {
		if(SCptr->device->sync_max_offset) {
			if(SCptr->SCp.phase == in_dataout)
				esp_cmd(esp, eregs, ESP_CMD_FLUSH);
		} else {
			esp_cmd(esp, eregs, ESP_CMD_FLUSH);
		}
	} else {
		if(SCptr->device->sync_max_offset)
			bogus_data = esp100_sync_hwbug(esp, eregs, SCptr, fifocnt);
		else
			esp_cmd(esp, eregs, ESP_CMD_FLUSH);
	}

	/* Until we are sure of what has happened, we are certainly
	 * in the dark.
	 */
	esp_advance_phase(SCptr, in_the_dark);

	if(bytes_sent < 0) {
		/* I've seen this happen due to lost state in this
		 * driver.  No idea why it happened, but allowing
		 * this value to be negative caused things to
		 * lock up.  This allows greater chance of recovery.
		 */
		ESPLOG(("esp%d: yieee, bytes_sent < 0!\n", esp->esp_id));
		ESPLOG(("esp%d: csz=%d fifocount=%d ecount=%d\n",
			esp->esp_id,
			esp->current_transfer_size, fifocnt, ecount));
		ESPLOG(("esp%d: use_sg=%d ptr=%p this_residual=%d\n",
			esp->esp_id,
			SCptr->use_sg, SCptr->SCp.ptr, SCptr->SCp.this_residual));
		ESPLOG(("esp%d: Forcing async for target %d\n", esp->esp_id, 
			SCptr->target));
		SCptr->device->borken = 1;
		SCptr->device->sync = 0;
		bytes_sent = 0;
	}

	/* Update the state of our transfer. */
	SCptr->SCp.ptr += bytes_sent;
	SCptr->SCp.this_residual -= bytes_sent;
	if(SCptr->SCp.this_residual < 0) {
		/* shit */
		printk("esp%d: Data transfer overrun.\n", esp->esp_id);
		SCptr->SCp.this_residual = 0;
	}

	/* Maybe continue. */
	if(!bogus_data) {
		ESPDATA(("!bogus_data, "));
		/* NO MATTER WHAT, we advance the scatterlist,
		 * if the target should decide to disconnect
		 * in between scatter chunks (which is common)
		 * we could die horribly!  I used to have the sg
		 * advance occur only if we are going back into
		 * (or are staying in) a data phase, you can
		 * imagine the hell I went through trying to
		 * figure this out.
		 */
		if(SCptr->use_sg && !SCptr->SCp.this_residual)
			advance_sg(SCptr);
		if(sreg_datainp(esp->sreg) || sreg_dataoutp(esp->sreg)) {
			ESPDATA(("to more data\n"));
			return esp_do_data(esp, eregs, dregs);
		}
		ESPDATA(("to new phase\n"));
		return esp_do_phase_determine(esp, eregs, dregs);
	}
	/* Bogus data, just wait for next interrupt. */
	ESPLOG(("esp%d: bogus_data during end of data phase\n",
		esp->esp_id));
	return do_intr_end;
}

/* Either a command is completing or a target is dropping off the bus
 * to continue the command in the background so we can do other work.
 */
static inline int esp_do_freebus(struct Sparc_ESP *esp, struct Sparc_ESP_regs *eregs,
				 struct sparc_dma_registers *dregs)
{
	Scsi_Cmnd *SCptr = esp->current_SC;
	int rval;

	rval = skipahead2(esp, eregs, dregs, SCptr, in_status, in_msgindone, in_freeing);
	if(rval)
		return rval;
	if(esp->ireg != ESP_INTR_DC) {
		ESPLOG(("esp%d: Target will not disconnect\n", esp->esp_id));
		return do_reset_bus; /* target will not drop BSY... */
	}
	esp->msgout_len = 0;
	esp->prevmsgout = NOP;
	if(esp->prevmsgin == COMMAND_COMPLETE) {
		/* Normal end of nexus. */
		if(esp->disconnected_SC || (esp->erev == fashme))
			esp_cmd(esp, eregs, ESP_CMD_ESEL);

		if(SCptr->SCp.Status != GOOD && SCptr->SCp.Status != CONDITION_GOOD &&
		   ((1<<SCptr->target) & esp->targets_present) &&
		   SCptr->device->sync && SCptr->device->sync_max_offset) {
			/* SCSI standard says that the synchronous capabilities
			 * should be renegotiated at this point.  Most likely
			 * we are about to request sense from this target
			 * in which case we want to avoid using sync
			 * transfers until we are sure of the current target
			 * state.
			 */
			ESPMISC(("esp: Status <%d> for target %d lun %d\n",
				 SCptr->SCp.Status, SCptr->target, SCptr->lun));

			/* But don't do this when spinning up a disk at
			 * boot time while we poll for completion as it
			 * fills up the console with messages.  Also, tapes
			 * can report not ready many times right after
			 * loading up a tape.
			 */
			if(SCptr->cmnd[0] != START_STOP &&
			   SCptr->data_cmnd[0] != START_STOP &&
			   SCptr->cmnd[0] != TEST_UNIT_READY &&
			   SCptr->data_cmnd[0] != TEST_UNIT_READY &&
			   !(SCptr->device->type == TYPE_TAPE &&
			     (SCptr->cmnd[0] == TEST_UNIT_READY ||
			      SCptr->data_cmnd[0] == TEST_UNIT_READY ||
			      SCptr->cmnd[0] == MODE_SENSE ||
			      SCptr->data_cmnd[0] == MODE_SENSE)))
				SCptr->device->sync = 0;
		}
		ESPDISC(("F<%02x,%02x>", SCptr->target, SCptr->lun));
		esp_done(esp, ((SCptr->SCp.Status & 0xff) |
			       ((SCptr->SCp.Message & 0xff)<<8) |
			       (DID_OK << 16)));
	} else if(esp->prevmsgin == DISCONNECT) {
		/* Normal disconnect. */
		esp_cmd(esp, eregs, ESP_CMD_ESEL);
		ESPDISC(("D<%02x,%02x>", SCptr->target, SCptr->lun));
		append_SC(&esp->disconnected_SC, SCptr);
		esp->current_SC = NULL;
		if(esp->issue_SC)
			esp_exec_cmd(esp);
	} else {
		/* Driver bug, we do not expect a disconnect here
		 * and should not have advanced the state engine
		 * to in_freeing.
		 */
		ESPLOG(("esp%d: last msg not disc and not cmd cmplt.\n",
			esp->esp_id));
		return do_reset_bus;
	}
	return do_intr_end;
}

/* Do the needy when a target tries to reconnect to us. */
static inline int esp_do_reconnect(struct Sparc_ESP *esp, struct Sparc_ESP_regs *eregs,
				   struct sparc_dma_registers *dregs)
{
	int lun, target;
	Scsi_Cmnd *SCptr;

	/* Check for all bogus conditions first. */
	target = reconnect_target(esp, eregs);
	if(target < 0) {
		ESPDISC(("bad bus bits\n"));
		return do_reset_bus;
	}
	lun = reconnect_lun(esp, eregs);
	if(lun < 0) {
		ESPDISC(("target=%2x, bad identify msg\n", target));
		return do_reset_bus;
	}

	/* Things look ok... */
	ESPDISC(("R<%02x,%02x>", target, lun));

	/* Must flush both FIFO and the DVMA on HME. */
	if(esp->erev == fashme) {
		/* XXX this still doesn't fix the problem... */
		esp_cmd(esp, eregs, ESP_CMD_FLUSH);
		dma_invalidate(esp->dregs, dvmahme);
	} else {
		esp_cmd(esp, eregs, ESP_CMD_FLUSH);
		if(esp100_reconnect_hwbug(esp, eregs))
			return do_reset_bus;
		esp_cmd(esp, eregs, ESP_CMD_NULL);
	}

	SCptr = remove_SC(&esp->disconnected_SC, (unchar) target, (unchar) lun);
	if(!SCptr) {
		Scsi_Cmnd *sp;

		ESPLOG(("esp%d: Eieeee, reconnecting unknown command!\n",
			esp->esp_id));
		ESPLOG(("QUEUE DUMP\n"));
		sp = esp->issue_SC;
		ESPLOG(("esp%d: issue_SC[", esp->esp_id));
		while(sp) {
			ESPLOG(("<%02x,%02x>", sp->target, sp->lun));
			sp = (Scsi_Cmnd *) sp->host_scribble;
		}
		ESPLOG(("]\n"));
		sp = esp->current_SC;
		ESPLOG(("esp%d: current_SC[", esp->esp_id));
		while(sp) {
			ESPLOG(("<%02x,%02x>", sp->target, sp->lun));
			sp = (Scsi_Cmnd *) sp->host_scribble;
		}
		ESPLOG(("]\n"));
		sp = esp->disconnected_SC;
		ESPLOG(("esp%d: disconnected_SC[", esp->esp_id));
		while(sp) {
			ESPLOG(("<%02x,%02x>", sp->target, sp->lun));
			sp = (Scsi_Cmnd *) sp->host_scribble;
		}
		ESPLOG(("]\n"));
		return do_reset_bus;
	}
	esp_connect(esp, eregs, SCptr);
	esp_cmd(esp, eregs, ESP_CMD_MOK);

	/* No need for explicit restore pointers operation. */
	esp->snip = 0;
	esp_advance_phase(SCptr, in_the_dark);
	return do_intr_end;
}

/* End of NEXUS (hopefully), pick up status + message byte then leave if
 * all goes well.
 */
static int esp_do_status(struct Sparc_ESP *esp, struct Sparc_ESP_regs *eregs,
			 struct sparc_dma_registers *dregs)
{
	Scsi_Cmnd *SCptr = esp->current_SC;
	int intr, rval;

	rval = skipahead1(esp, eregs, dregs, SCptr, in_the_dark, in_status);
	if(rval)
		return rval;
	intr = esp->ireg;
	ESPSTAT(("esp_do_status: "));
	if(intr != ESP_INTR_DC) {
		int message_out = 0; /* for parity problems */

		/* Ack the message. */
		ESPSTAT(("ack msg, "));
		esp_cmd(esp, eregs, ESP_CMD_MOK);

		if(esp->erev != fashme) {
			dma_flashclear(dregs, esp->dma->revision);

			/* Wait till the first bits settle. */
			while(esp->esp_command[0] == 0xff)
				udelay(1);
		} else {
			esp->esp_command[0] = esp->hme_fifo_workaround_buffer[0];
			esp->esp_command[1] = esp->hme_fifo_workaround_buffer[1];
		}

		ESPSTAT(("got something, "));
		/* ESP chimes in with one of
		 *
		 * 1) function done interrupt:
		 *	both status and message in bytes
		 *	are available
		 *
		 * 2) bus service interrupt:
		 *	only status byte was acquired
		 *
		 * 3) Anything else:
		 *	can't happen, but we test for it
		 *	anyways
		 *
		 * ALSO: If bad parity was detected on either
		 *       the status _or_ the message byte then
		 *       the ESP has asserted ATN on the bus
		 *       and we must therefore wait for the
		 *       next phase change.
		 */
		if(intr & ESP_INTR_FDONE) {
			/* We got it all, hallejulia. */
			ESPSTAT(("got both, "));
			SCptr->SCp.Status = esp->esp_command[0];
			SCptr->SCp.Message = esp->esp_command[1];
			esp->prevmsgin = SCptr->SCp.Message;
			esp->cur_msgin[0] = SCptr->SCp.Message;
			if(esp->sreg & ESP_STAT_PERR) {
				/* There was bad parity for the
				 * message byte, the status byte
				 * was ok.
				 */
				message_out = MSG_PARITY_ERROR;
			}
		} else if(intr == ESP_INTR_BSERV) {
			/* Only got status byte. */
			ESPLOG(("esp%d: got status only, ", esp->esp_id));
			if(!(esp->sreg & ESP_STAT_PERR)) {
				SCptr->SCp.Status = esp->esp_command[0];
				SCptr->SCp.Message = 0xff;
			} else {
				/* The status byte had bad parity.
				 * we leave the scsi_pointer Status
				 * field alone as we set it to a default
				 * of CHECK_CONDITION in esp_queue.
				 */
				message_out = INITIATOR_ERROR;
			}
		} else {
			/* This shouldn't happen ever. */
			ESPSTAT(("got bolixed\n"));
			esp_advance_phase(SCptr, in_the_dark);
			return esp_do_phase_determine(esp, eregs, dregs);
		}

		if(!message_out) {
			ESPSTAT(("status=%2x msg=%2x, ", SCptr->SCp.Status,
				SCptr->SCp.Message));
			if(SCptr->SCp.Message == COMMAND_COMPLETE) {
				ESPSTAT(("and was COMMAND_COMPLETE\n"));
				esp_advance_phase(SCptr, in_freeing);
				return esp_do_freebus(esp, eregs, dregs);
			} else {
				ESPLOG(("esp%d: and _not_ COMMAND_COMPLETE\n",
					esp->esp_id));
				esp->msgin_len = esp->msgin_ctr = 1;
				esp_advance_phase(SCptr, in_msgindone);
				return esp_do_msgindone(esp, eregs, dregs);
			}
		} else {
			/* With luck we'll be able to let the target
			 * know that bad parity happened, it will know
			 * which byte caused the problems and send it
			 * again.  For the case where the status byte
			 * receives bad parity, I do not believe most
			 * targets recover very well.  We'll see.
			 */
			ESPLOG(("esp%d: bad parity somewhere mout=%2x\n",
				esp->esp_id, message_out));
			esp->cur_msgout[0] = message_out;
			esp->msgout_len = esp->msgout_ctr = 1;
			esp_advance_phase(SCptr, in_the_dark);
			return esp_do_phase_determine(esp, eregs, dregs);
		}
	} else {
		/* If we disconnect now, all hell breaks loose. */
		ESPLOG(("esp%d: whoops, disconnect\n", esp->esp_id));
		esp_advance_phase(SCptr, in_the_dark);
		return esp_do_phase_determine(esp, eregs, dregs);
	}
}

/* The target has control of the bus and we have to see where it has
 * taken us.
 */
static int esp_do_phase_determine(struct Sparc_ESP *esp,
				  struct Sparc_ESP_regs *eregs,
				  struct sparc_dma_registers *dregs)
{
	Scsi_Cmnd *SCptr = esp->current_SC;

	ESPPHASE(("esp_do_phase_determine: "));
	if(!(esp->ireg & ESP_INTR_DC)) {
		switch(esp->sreg & ESP_STAT_PMASK) {
		case ESP_DOP:
		case ESP_DIP:
			ESPPHASE(("to data phase\n"));
			return esp_do_data(esp, eregs, dregs);

		case ESP_STATP:
			/* Whee, status phase, finish up the command. */
			ESPPHASE(("to status phase\n"));
			esp_cmd(esp, eregs, ESP_CMD_FLUSH);
			if(esp->erev != fashme) {
				esp->esp_command[0] = 0xff;
				esp->esp_command[1] = 0xff;
				eregs->esp_tclow = 2;
				eregs->esp_tcmed = 0;
				dregs->cond_reg |= (DMA_ST_WRITE | DMA_ENABLE);
				if(esp->dma->revision == dvmaesc1)
					dregs->cnt = 0x1000;
				dregs->st_addr = esp->esp_command_dvma;
				esp_cmd(esp, eregs, ESP_CMD_DMA | ESP_CMD_ICCSEQ);
			} else {
				/* Using DVMA for status/message bytes is
				 * unreliable on HME, nice job QLogic.
				 * Happy Meal indeed....
				 */
				esp_cmd(esp, eregs, ESP_CMD_ICCSEQ);
			}
			esp_advance_phase(SCptr, in_status);
			return esp_do_status(esp, eregs, dregs);

		case ESP_MOP:
			ESPPHASE(("to msgout phase\n"));
			esp_advance_phase(SCptr, in_msgout);
			return esp_do_msgout(esp, eregs, dregs);

		case ESP_MIP:
			ESPPHASE(("to msgin phase\n"));
			esp_advance_phase(SCptr, in_msgin);
			return esp_do_msgin(esp, eregs, dregs);

		case ESP_CMDP:
			/* Ugh, we're running a non-standard command the
			 * ESP doesn't understand, one byte at a time.
			 */
			ESPPHASE(("to cmd phase\n"));
			esp_advance_phase(SCptr, in_cmdbegin);
			return esp_do_cmdbegin(esp, eregs, dregs);
		};
	} else {
		Scsi_Device *dp = SCptr->device;

		/* This means real problems if we see this
		 * here.  Unless we were actually trying
		 * to force the device to abort/reset.
		 */
		ESPLOG(("esp%d Disconnect amidst phases, ", esp->esp_id));
		ESPLOG(("pphase<%s> cphase<%s>, ",
			phase_string(SCptr->SCp.phase),
			phase_string(SCptr->SCp.sent_command)));
		if(esp->disconnected_SC || (esp->erev == fashme))
			esp_cmd(esp, eregs, ESP_CMD_ESEL);

		switch(esp->cur_msgout[0]) {
		default:
			/* We didn't expect this to happen at all. */
			ESPLOG(("device is bolixed\n"));
			esp_advance_phase(SCptr, in_tgterror);
			esp_done(esp, (DID_ERROR << 16));
			break;

		case BUS_DEVICE_RESET:
			ESPLOG(("device reset successful\n"));
			dp->sync_max_offset = 0;
			dp->sync_min_period = 0;
			dp->sync = 0;
			esp_advance_phase(SCptr, in_resetdev);
			esp_done(esp, (DID_RESET << 16));
			break;

		case ABORT:
			ESPLOG(("device abort successful\n"));
			esp_advance_phase(SCptr, in_abortone);
			esp_done(esp, (DID_ABORT << 16));
			break;

		};
		return do_intr_end;
	}

	ESPLOG(("esp%d: to unknown phase\n", esp->esp_id));
	printk("esp%d: Bizarre bus phase %2x.\n", esp->esp_id,
	       esp->sreg & ESP_STAT_PMASK);
	return do_reset_bus;
}

/* First interrupt after exec'ing a cmd comes here. */
static int esp_select_complete(struct Sparc_ESP *esp, struct Sparc_ESP_regs *eregs,
			       struct sparc_dma_registers *dregs)
{
	Scsi_Cmnd *SCptr = esp->current_SC;
	Scsi_Device *SDptr = SCptr->device;
	int cmd_bytes_sent, fcnt;

	if(esp->erev != fashme)
		esp->seqreg = (eregs->esp_sstep & ESP_STEP_VBITS);
	if(esp->erev == fashme)
		fcnt = esp->hme_fifo_workaround_count;
	else
		fcnt = (eregs->esp_fflags & ESP_FF_FBYTES);
	cmd_bytes_sent = esp_bytes_sent(esp, dregs, fcnt);
	dma_invalidate(dregs, esp->dma->revision);

	/* Let's check to see if a reselect happened
	 * while we we're trying to select.  This must
	 * be checked first.
	 */
	if(esp->ireg == (ESP_INTR_RSEL | ESP_INTR_FDONE)) {
		esp_reconnect(esp, SCptr);
		return esp_do_reconnect(esp, eregs, dregs);
	}

	/* Looks like things worked, we should see a bus service &
	 * a function complete interrupt at this point.  Note we
	 * are doing a direct comparison because we don't want to
	 * be fooled into thinking selection was successful if
	 * ESP_INTR_DC is set, see below.
	 */
	if(esp->ireg == (ESP_INTR_FDONE | ESP_INTR_BSERV)) {
		/* target speaks... */
		esp->targets_present |= (1<<SCptr->target);

		/* What if the target ignores the sdtr? */
		if(esp->snip)
			SDptr->sync = 1;

		/* See how far, if at all, we got in getting
		 * the information out to the target.
		 */
		switch(esp->seqreg) {
		default:

		case ESP_STEP_ASEL:
			/* Arbitration won, target selected, but
			 * we are in some phase which is not command
			 * phase nor is it message out phase.
			 *
			 * XXX We've confused the target, obviously.
			 * XXX So clear it's state, but we also end
			 * XXX up clearing everyone elses.  That isn't
			 * XXX so nice.  I'd like to just reset this
			 * XXX target, but if I cannot even get it's
			 * XXX attention and finish selection to talk
			 * XXX to it, there is not much more I can do.
			 * XXX If we have a loaded bus we're going to
			 * XXX spend the next second or so renegotiating
			 * XXX for synchronous transfers.
			 */
			ESPLOG(("esp%d: STEP_ASEL for tgt %d\n",
				esp->esp_id, SCptr->target));

		case ESP_STEP_SID:
			/* Arbitration won, target selected, went
			 * to message out phase, sent one message
			 * byte, then we stopped.  ATN is asserted
			 * on the SCSI bus and the target is still
			 * there hanging on.  This is a legal
			 * sequence step if we gave the ESP a select
			 * and stop command.
			 *
			 * XXX See above, I could set the borken flag
			 * XXX in the device struct and retry the
			 * XXX command.  But would that help for
			 * XXX tagged capable targets?
			 */

		case ESP_STEP_NCMD:
			/* Arbitration won, target selected, maybe
			 * sent the one message byte in message out
			 * phase, but we did not go to command phase
			 * in the end.  Actually, we could have sent
			 * only some of the message bytes if we tried
			 * to send out the entire identify and tag
			 * message using ESP_CMD_SA3.
			 */
			cmd_bytes_sent = 0;
			break;

		case ESP_STEP_PPC:
			/* No, not the powerPC pinhead.  Arbitration
			 * won, all message bytes sent if we went to
			 * message out phase, went to command phase
			 * but only part of the command was sent.
			 *
			 * XXX I've seen this, but usually in conjunction
			 * XXX with a gross error which appears to have
			 * XXX occurred between the time I told the
			 * XXX ESP to arbitrate and when I got the
			 * XXX interrupt.  Could I have misloaded the
			 * XXX command bytes into the fifo?  Actually,
			 * XXX I most likely missed a phase, and therefore
			 * XXX went into never never land and didn't even
			 * XXX know it.  That was the old driver though.
			 * XXX What is even more peculiar is that the ESP
			 * XXX showed the proper function complete and
			 * XXX bus service bits in the interrupt register.
			 */

		case ESP_STEP_FINI4:
		case ESP_STEP_FINI5:
		case ESP_STEP_FINI6:
		case ESP_STEP_FINI7:
			/* Account for the identify message */
			if(SCptr->SCp.phase == in_slct_norm)
				cmd_bytes_sent -= 1;
		};
		if(esp->erev != fashme)
			esp_cmd(esp, eregs, ESP_CMD_NULL);

		/* Be careful, we could really get fucked during synchronous
		 * data transfers if we try to flush the fifo now.
		 */
		if((esp->erev != fashme) && /* not a Happy Meal and... */
		   !fcnt && /* Fifo is empty and... */
		   /* either we are not doing synchronous transfers or... */
		   (!SDptr->sync_max_offset ||
		    /* We are not going into data in phase. */
		    ((esp->sreg & ESP_STAT_PMASK) != ESP_DIP)))
			esp_cmd(esp, eregs, ESP_CMD_FLUSH); /* flush is safe */

		/* See how far we got if this is not a slow command. */
		if(!esp->esp_slowcmd) {
			if(cmd_bytes_sent < 0)
				cmd_bytes_sent = 0;
			if(cmd_bytes_sent != SCptr->cmd_len) {
				/* Crapola, mark it as a slowcmd
				 * so that we have some chance of
				 * keeping the command alive with
				 * good luck.
				 *
				 * XXX Actually, if we didn't send it all
				 * XXX this means either we didn't set things
				 * XXX up properly (driver bug) or the target
				 * XXX or the ESP detected parity on one of
				 * XXX the command bytes.  This makes much
				 * XXX more sense, and therefore this code
				 * XXX should be changed to send out a
				 * XXX parity error message or if the status
				 * XXX register shows no parity error then
				 * XXX just expect the target to bring the
				 * XXX bus into message in phase so that it
				 * XXX can send us the parity error message.
				 * XXX SCSI sucks...
				 */
				esp->esp_slowcmd = 1;
				esp->esp_scmdp = &(SCptr->cmnd[cmd_bytes_sent]);
				esp->esp_scmdleft = (SCptr->cmd_len - cmd_bytes_sent);
			}
		}

		/* Now figure out where we went. */
		esp_advance_phase(SCptr, in_the_dark);
		return esp_do_phase_determine(esp, eregs, dregs);
	}

	/* Did the target even make it? */
	if(esp->ireg == ESP_INTR_DC) {
		/* wheee... nobody there or they didn't like
		 * what we told it to do, clean up.
		 */

		/* If anyone is off the bus, but working on
		 * a command in the background for us, tell
		 * the ESP to listen for them.
		 */
		if(esp->disconnected_SC)
			esp_cmd(esp, eregs, ESP_CMD_ESEL);

		if(((1<<SCptr->target) & esp->targets_present) &&
		   esp->seqreg && esp->cur_msgout[0] == EXTENDED_MESSAGE &&
		   (SCptr->SCp.phase == in_slct_msg ||
		    SCptr->SCp.phase == in_slct_stop)) {
			/* shit */
			esp->snip = 0;
			printk("esp%d: Failed synchronous negotiation for target %d "
			       "lun %d\n",
			       esp->esp_id, SCptr->target, SCptr->lun);
			SDptr->sync_max_offset = 0;
			SDptr->sync_min_period = 0;
			SDptr->sync = 1; /* so we don't negotiate again */

			/* Run the command again, this time though we
			 * won't try to negotiate for synchronous transfers.
			 *
			 * XXX I'd like to do something like send an
			 * XXX INITIATOR_ERROR or ABORT message to the
			 * XXX target to tell it, "Sorry I confused you,
			 * XXX please come back and I will be nicer next
			 * XXX time".  But that requires having the target
			 * XXX on the bus, and it has dropped BSY on us.
			 */
			esp->current_SC = NULL;
			esp_advance_phase(SCptr, not_issued);
			prepend_SC(&esp->issue_SC, SCptr);
			esp_exec_cmd(esp);
			return do_intr_end;
		}

		/* Ok, this is normal, this is what we see during boot
		 * or whenever when we are scanning the bus for targets.
		 * But first make sure that is really what is happening.
		 */
		if(((1<<SCptr->target) & esp->targets_present)) {
			printk("esp%d: Warning, live target %d not responding to "
			       "selection.\n", esp->esp_id, SCptr->target);

			/* This _CAN_ happen.  The SCSI standard states that
			 * the target is to _not_ respond to selection if
			 * _it_ detects bad parity on the bus for any reason.
			 * Therefore, we assume that if we've talked successfully
			 * to this target before, bad parity is the problem.
			 */
			esp_done(esp, (DID_PARITY << 16));
		} else {
			/* Else, there really isn't anyone there. */
			ESPMISC(("esp: selection failure, maybe nobody there?\n"));
			ESPMISC(("esp: target %d lun %d\n",
				 SCptr->target, SCptr->lun));
			esp_done(esp, (DID_BAD_TARGET << 16));
		}
		return do_intr_end;
	}


	ESPLOG(("esp%d: Selection failure.\n", esp->esp_id));
	printk("esp%d: Currently -- ", esp->esp_id);
	esp_print_ireg(esp->ireg);
	printk(" ");
	esp_print_statreg(esp->sreg);
	printk(" ");
	esp_print_seqreg(esp->seqreg);
	printk("\n");
	printk("esp%d: New -- ", esp->esp_id);
	esp->sreg = eregs->esp_status;
	esp->seqreg = eregs->esp_sstep;
	esp->ireg = eregs->esp_intrpt;
	esp_print_ireg(esp->ireg);
	printk(" ");
	esp_print_statreg(esp->sreg);
	printk(" ");
	esp_print_seqreg(esp->seqreg);
	printk("\n");
	ESPLOG(("esp%d: resetting bus\n", esp->esp_id));
	return do_reset_bus; /* ugh... */
}

/* Continue reading bytes for msgin phase. */
static int esp_do_msgincont(struct Sparc_ESP *esp, struct Sparc_ESP_regs *eregs,
			    struct sparc_dma_registers *dregs)
{
	if(esp->ireg & ESP_INTR_BSERV) {
		/* in the right phase too? */
		if((esp->sreg & ESP_STAT_PMASK) == ESP_MIP) {
			/* phew... */
			esp_cmd(esp, eregs, ESP_CMD_TI);
			esp_advance_phase(esp->current_SC, in_msgindone);
			return do_intr_end;
		}

		/* We changed phase but ESP shows bus service,
		 * in this case it is most likely that we, the
		 * hacker who has been up for 20hrs straight
		 * staring at the screen, drowned in coffee
		 * smelling like retched cigarette ashes
		 * have miscoded something..... so, try to
		 * recover as best we can.
		 */
		printk("esp%d: message in mis-carriage.\n", esp->esp_id);
	}
	esp_advance_phase(esp->current_SC, in_the_dark);
	return do_phase_determine;
}

static inline int check_singlebyte_msg(struct Sparc_ESP *esp,
				       struct Sparc_ESP_regs *eregs,
				       struct sparc_dma_registers *dregs)
{
	esp->prevmsgin = esp->cur_msgin[0];
	if(esp->cur_msgin[0] & 0x80) {
		/* wheee... */
		ESPLOG(("esp%d: target sends identify amidst phases\n",
			esp->esp_id));
		esp_advance_phase(esp->current_SC, in_the_dark);
		return 0;
	} else if(((esp->cur_msgin[0] & 0xf0) == 0x20) ||
		  (esp->cur_msgin[0] == EXTENDED_MESSAGE)) {
		esp->msgin_len = 2;
		esp_advance_phase(esp->current_SC, in_msgincont);
		return 0;
	}
	esp_advance_phase(esp->current_SC, in_the_dark);
	switch(esp->cur_msgin[0]) {
	default:
		/* We don't want to hear about it. */
		ESPLOG(("esp%d: msg %02x which we don't know about\n", esp->esp_id,
			esp->cur_msgin[0]));
		return MESSAGE_REJECT;

	case NOP:
		ESPLOG(("esp%d: target %d sends a nop\n", esp->esp_id,
			esp->current_SC->target));
		return 0;

	case RESTORE_POINTERS:
	case SAVE_POINTERS:
		/* We handle this all automatically. */
		return 0;

	case COMMAND_COMPLETE:
	case DISCONNECT:
		/* Freeing the bus, let it go. */
		esp->current_SC->SCp.phase = in_freeing;
		return 0;

	case MESSAGE_REJECT:
		ESPMISC(("msg reject, "));
		if(esp->prevmsgout == EXTENDED_MESSAGE) {
			Scsi_Device *SDptr = esp->current_SC->device;

			/* Doesn't look like this target can
			 * do synchronous or WIDE transfers.
			 */
			ESPSDTR(("got reject, was trying nego, clearing sync/WIDE\n"));
			SDptr->sync = 1;
			SDptr->wide = 1;
			SDptr->sync_min_period = 0;
			SDptr->sync_max_offset = 0;
			return 0;
		} else {
			ESPMISC(("not sync nego, sending ABORT\n"));
			return ABORT;
		}
	};
}

/* Target negotiates for synchronous transfers before we do, this
 * is legal although very strange.  What is even funnier is that
 * the SCSI2 standard specifically recommends against targets doing
 * this because so many initiators cannot cope with this occuring.
 */
static inline int target_with_ants_in_pants(struct Sparc_ESP *esp,
					    Scsi_Cmnd *SCptr,
					    Scsi_Device *SDptr)
{
	if(SDptr->sync || SDptr->borken) {
		/* sorry, no can do */
		ESPSDTR(("forcing to async, "));
		build_sync_nego_msg(esp, 0, 0);
		SDptr->sync = 1;
		esp->snip = 1;
		ESPLOG(("esp%d: hoping for msgout\n", esp->esp_id));
		esp_advance_phase(SCptr, in_the_dark);
		return EXTENDED_MESSAGE;
	}

	/* Ok, we'll check them out... */
	return 0;
}

static inline void sync_report(struct Sparc_ESP *esp)
{
	int msg3, msg4;
	char *type;

	msg3 = esp->cur_msgin[3];
	msg4 = esp->cur_msgin[4];
	if(msg4) {
		int hz = 1000000000 / (msg3 * 4);
		int integer = hz / 1000000;
		int fraction = (hz - (integer * 1000000)) / 10000;
		if((esp->erev == fashme) &&
		   (esp->config3[esp->current_SC->target] & ESP_CONFIG3_EWIDE)) {
			type = "FAST-WIDE";
			integer <<= 1;
			fraction <<= 1;
		} else if((msg3 * 4) < 200) {
			type = "FAST";
		} else {
			type = "synchronous";
		}
		printk(KERN_INFO "esp%d: target %d [period %dns offset %d %d.%02dMHz %s SCSI%s]\n",
		       esp->esp_id, esp->current_SC->target,
		       (int) msg3 * 4,
		       (int) msg4,
		       integer, fraction, type,
		       (((msg3 * 4) < 200) ? "-II" : ""));
	} else {
		printk(KERN_INFO "esp%d: target %d asynchronous\n",
		       esp->esp_id, esp->current_SC->target);
	}
}

static inline int check_multibyte_msg(struct Sparc_ESP *esp,
				       struct Sparc_ESP_regs *eregs,
				       struct sparc_dma_registers *dregs)
{
	Scsi_Cmnd *SCptr = esp->current_SC;
	Scsi_Device *SDptr = SCptr->device;
	unchar regval = 0;
	int message_out = 0;

	ESPSDTR(("chk multibyte msg: "));
	if(esp->cur_msgin[2] == EXTENDED_SDTR) {
		int period = esp->cur_msgin[3];
		int offset = esp->cur_msgin[4];

		ESPSDTR(("is sync nego response, "));
		if(!esp->snip) {
			int rval;

			/* Target negotiates first! */
			ESPSDTR(("target jumps the gun, "));
			message_out = EXTENDED_MESSAGE; /* we must respond */
			rval = target_with_ants_in_pants(esp, SCptr, SDptr);
			if(rval)
				return rval;
		}

		ESPSDTR(("examining sdtr, "));

		/* Offset cannot be larger than ESP fifo size. */
		if(offset > 15) {
			ESPSDTR(("offset too big %2x, ", offset));
			offset = 15;
			ESPSDTR(("sending back new offset\n"));
			build_sync_nego_msg(esp, period, offset);
			return EXTENDED_MESSAGE;
		}

		if(offset && period > esp->max_period) {
			/* Yeee, async for this slow device. */
			ESPSDTR(("period too long %2x, ", period));
			build_sync_nego_msg(esp, 0, 0);
			ESPSDTR(("hoping for msgout\n"));
			esp_advance_phase(esp->current_SC, in_the_dark);
			return EXTENDED_MESSAGE;
		} else if (offset && period < esp->min_period) {
			ESPSDTR(("period too short %2x, ", period));
			period = esp->min_period;
			if(esp->erev > esp236)
				regval = 4;
			else
				regval = 5;
		} else if(offset) {
			int tmp;

			ESPSDTR(("period is ok, "));
			tmp = esp->ccycle / 1000;
			regval = (((period << 2) + tmp - 1) / tmp);
			if(regval && ((esp->erev == fas100a ||
				       esp->erev == fas236 ||
				       esp->erev == fashme))) {
				if(period >= 50)
					regval--;
			}
		}

		if(offset) {
			unchar bit;

			SDptr->sync_min_period = (regval & 0x1f);
			SDptr->sync_max_offset = (offset | esp->radelay);
			if((esp->erev == fas100a || esp->erev == fas236 || esp->erev == fashme)) {
				if((esp->erev == fas100a) || (esp->erev == fashme))
					bit = ESP_CONFIG3_FAST;
				else
					bit = ESP_CONFIG3_FSCSI;
				if(period < 50)
					esp->config3[SCptr->target] |= bit;
				else
					esp->config3[SCptr->target] &= ~bit;
				eregs->esp_cfg3 = esp->config3[SCptr->target];
			}
			eregs->esp_soff = SDptr->sync_min_period;
			eregs->esp_stp  = SDptr->sync_max_offset;

			ESPSDTR(("soff=%2x stp=%2x cfg3=%2x\n",
				SDptr->sync_max_offset,
				SDptr->sync_min_period,
				esp->config3[SCptr->target]));

			esp->snip = 0;
		} else if(SDptr->sync_max_offset) {
			unchar bit;

			/* back to async mode */
			ESPSDTR(("unaccaptable sync nego, forcing async\n"));
			SDptr->sync_max_offset = 0;
			SDptr->sync_min_period = 0;
			eregs->esp_soff = 0;
			eregs->esp_stp = 0;
			if((esp->erev == fas100a || esp->erev == fas236 || esp->erev == fashme)) {
				if((esp->erev == fas100a) || (esp->erev == fashme))
					bit = ESP_CONFIG3_FAST;
				else
					bit = ESP_CONFIG3_FSCSI;
				esp->config3[SCptr->target] &= ~bit;
				eregs->esp_cfg3 = esp->config3[SCptr->target];
			}
		}

		sync_report(esp);

		ESPSDTR(("chk multibyte msg: sync is known, "));
		SDptr->sync = 1;

		if(message_out) {
			ESPLOG(("esp%d: sending sdtr back, hoping for msgout\n",
				esp->esp_id));
			build_sync_nego_msg(esp, period, offset);
			esp_advance_phase(SCptr, in_the_dark);
			return EXTENDED_MESSAGE;
		}

		ESPSDTR(("returning zero\n"));
		esp_advance_phase(SCptr, in_the_dark); /* ...or else! */
		return 0;
	} else if(esp->cur_msgin[2] == EXTENDED_WDTR) {
		int size = 8 << esp->cur_msgin[3];

		esp->wnip = 0;
		if(esp->erev != fashme) {
			printk("esp%d: AIEEE wide msg received and not HME.\n",
			       esp->esp_id);
			message_out = MESSAGE_REJECT;
		} else if(size > 16) {
			printk("esp%d: AIEEE wide transfer for %d size not supported.\n",
			       esp->esp_id, size);
			message_out = MESSAGE_REJECT;
		} else {
			/* Things look good; let's see what we got. */
			if(size == 16) {
				/* Set config 3 register for this target. */
				printk("esp%d: 16 byte WIDE transfers enabled for target %d.\n",
				       esp->esp_id, SCptr->target);
				esp->config3[SCptr->target] |= ESP_CONFIG3_EWIDE;
			} else {
				/* Just make sure it was one byte sized. */
				if(size != 8) {
					printk("esp%d: Aieee, wide nego of %d size.\n",
					       esp->esp_id, size);
					message_out = MESSAGE_REJECT;
					goto finish;
				}
				/* Pure paranoia. */
				esp->config3[SCptr->target] &= ~(ESP_CONFIG3_EWIDE);
			}
			eregs->esp_cfg3 = esp->config3[SCptr->target];

			/* Regardless, next try for sync transfers. */
			build_sync_nego_msg(esp, esp->sync_defp, 15);
			SDptr->sync = 1;
			esp->snip = 1;
			message_out = EXTENDED_MESSAGE;
		}
	} else if(esp->cur_msgin[2] == EXTENDED_MODIFY_DATA_POINTER) {
		ESPLOG(("esp%d: rejecting modify data ptr msg\n", esp->esp_id));
		message_out = MESSAGE_REJECT;
	}
finish:
	esp_advance_phase(SCptr, in_the_dark);
	return message_out;
}

static int esp_do_msgindone(struct Sparc_ESP *esp, struct Sparc_ESP_regs *eregs,
			    struct sparc_dma_registers *dregs)
{
	Scsi_Cmnd *SCptr = esp->current_SC;
	int message_out = 0, it = 0, rval;

	rval = skipahead1(esp, eregs, dregs, SCptr, in_msgin, in_msgindone);
	if(rval)
		return rval;
	if(SCptr->SCp.sent_command != in_status) {
		if(!(esp->ireg & ESP_INTR_DC)) {
			if(esp->msgin_len && (esp->sreg & ESP_STAT_PERR)) {
				message_out = MSG_PARITY_ERROR;
				esp_cmd(esp, eregs, ESP_CMD_FLUSH);
			} else if(esp->erev != fashme &&
				  (it = (eregs->esp_fflags & ESP_FF_FBYTES))!=1) {
				/* We certainly dropped the ball somewhere. */
				message_out = INITIATOR_ERROR;
				esp_cmd(esp, eregs, ESP_CMD_FLUSH);
			} else if(!esp->msgin_len) {
				if(esp->erev == fashme)
					it = esp->hme_fifo_workaround_buffer[0];
				else
					it = eregs->esp_fdata;
				esp_advance_phase(SCptr, in_msgincont);
			} else {
				/* it is ok and we want it */
				if(esp->erev == fashme)
					it = esp->cur_msgin[esp->msgin_ctr] =
						esp->hme_fifo_workaround_buffer[0];
				else
					it = esp->cur_msgin[esp->msgin_ctr] =
						eregs->esp_fdata;
				esp->msgin_ctr++;
			}
		} else {
			esp_advance_phase(SCptr, in_the_dark);
			return do_work_bus;
		}
	} else {
		it = esp->cur_msgin[0];
	}
	if(!message_out && esp->msgin_len) {
		if(esp->msgin_ctr < esp->msgin_len) {
			esp_advance_phase(SCptr, in_msgincont);
		} else if(esp->msgin_len == 1) {
			message_out = check_singlebyte_msg(esp, eregs, dregs);
		} else if(esp->msgin_len == 2) {
			if(esp->cur_msgin[0] == EXTENDED_MESSAGE) {
				if((it+2) >= 15) {
					message_out = MESSAGE_REJECT;
				} else {
					esp->msgin_len = (it + 2);
					esp_advance_phase(SCptr, in_msgincont);
				}
			} else {
				message_out = MESSAGE_REJECT; /* foo on you */
			}
		} else {
			message_out = check_multibyte_msg(esp, eregs, dregs);
		}
	}
	if(message_out < 0) {
		return -message_out;
	} else if(message_out) {
		if(((message_out != 1) &&
		    ((message_out < 0x20) || (message_out & 0x80))))
			esp->msgout_len = 1;
		esp->cur_msgout[0] = message_out;
		esp_cmd(esp, eregs, ESP_CMD_SATN);
		esp_advance_phase(SCptr, in_the_dark);
		esp->msgin_len = 0;
	}
	esp->sreg = eregs->esp_status;
	esp->sreg &= ~(ESP_STAT_INTR);
	if((esp->sreg & (ESP_STAT_PMSG|ESP_STAT_PCD)) == (ESP_STAT_PMSG|ESP_STAT_PCD))
		esp_cmd(esp, eregs, ESP_CMD_MOK);
	if((SCptr->SCp.sent_command == in_msgindone) &&
	    (SCptr->SCp.phase == in_freeing))
		return esp_do_freebus(esp, eregs, dregs);
	return do_intr_end;
}

static int esp_do_cmdbegin(struct Sparc_ESP *esp, struct Sparc_ESP_regs *eregs,
			   struct sparc_dma_registers *dregs)
{
	Scsi_Cmnd *SCptr = esp->current_SC;

	esp_advance_phase(SCptr, in_cmdend);
	if(esp->erev == fashme) {
		unsigned long tmp = dregs->cond_reg;
		int i;

		for(i = 0; i < esp->esp_scmdleft; i++)
			esp->esp_command[i] = *esp->esp_scmdp++;
		esp->esp_scmdleft = 0;
		esp_cmd(esp, eregs, ESP_CMD_FLUSH);
		esp_setcount(eregs, i, 1);
		esp_cmd(esp, eregs, (ESP_CMD_DMA | ESP_CMD_TI));
		tmp |= (DMA_SCSI_DISAB | DMA_ENABLE);
		tmp &= ~(DMA_ST_WRITE);
		dregs->cnt = i;
		dregs->st_addr = esp->esp_command_dvma;
		dregs->cond_reg = tmp;
	} else {
		unsigned char tmp;
		esp_cmd(esp, eregs, ESP_CMD_FLUSH);
		tmp = *esp->esp_scmdp++;
		esp->esp_scmdleft--;
		eregs->esp_fdata = tmp;
		esp_cmd(esp, eregs, ESP_CMD_TI);
	}
	return do_intr_end;
}

static inline int esp_do_cmddone(struct Sparc_ESP *esp, struct Sparc_ESP_regs *eregs,
				 struct sparc_dma_registers *dregs)
{
	if(esp->erev == fashme)
		dma_invalidate(dregs, dvmahme);
	else
		esp_cmd(esp, eregs, ESP_CMD_NULL);
	if(esp->ireg & ESP_INTR_BSERV) {
		esp_advance_phase(esp->current_SC, in_the_dark);
		return esp_do_phase_determine(esp, eregs, dregs);
	}
	ESPLOG(("esp%d: in do_cmddone() but didn't get BSERV interrupt.\n",
		esp->esp_id));
	return do_reset_bus;
}

static int esp_do_msgout(struct Sparc_ESP *esp, struct Sparc_ESP_regs *eregs,
				struct sparc_dma_registers *dregs)
{
	esp_cmd(esp, eregs, ESP_CMD_FLUSH);
	switch(esp->msgout_len) {
	case 1:
		if(esp->erev == fashme)
			hme_fifo_push(esp, eregs, &esp->cur_msgout[0], 1);
		else
			eregs->esp_fdata = esp->cur_msgout[0];
		esp_cmd(esp, eregs, ESP_CMD_TI);
		break;

	case 2:
		esp->esp_command[0] = esp->cur_msgout[0];
		esp->esp_command[1] = esp->cur_msgout[1];
		if(esp->erev == fashme) {
			hme_fifo_push(esp, eregs, &esp->cur_msgout[0], 2);
			esp_cmd(esp, eregs, ESP_CMD_TI);
		} else {
			dma_setup(dregs, esp->dma->revision,
				  esp->esp_command_dvma, 2, 0);
			esp_setcount(eregs, 2, 0);
			esp_cmd(esp, eregs, ESP_CMD_DMA | ESP_CMD_TI);
		}
		break;

	case 4:
		esp->esp_command[0] = esp->cur_msgout[0];
		esp->esp_command[1] = esp->cur_msgout[1];
		esp->esp_command[2] = esp->cur_msgout[2];
		esp->esp_command[3] = esp->cur_msgout[3];
		esp->snip = 1;
		if(esp->erev == fashme) {
			hme_fifo_push(esp, eregs, &esp->cur_msgout[0], 4);
			esp_cmd(esp, eregs, ESP_CMD_TI);
		} else {
			dma_setup(dregs, esp->dma->revision,
				  esp->esp_command_dvma, 4, 0);
			esp_setcount(eregs, 4, 0);
			esp_cmd(esp, eregs, ESP_CMD_DMA | ESP_CMD_TI);
		}
		break;

	case 5:
		esp->esp_command[0] = esp->cur_msgout[0];
		esp->esp_command[1] = esp->cur_msgout[1];
		esp->esp_command[2] = esp->cur_msgout[